參數(shù)資料
型號: MC68HC705CT4FN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.048 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 69/152頁
文件大小: 668K
代理商: MC68HC705CT4FN
General Description
Signal Description
MC68HC705CT4 Rev. 2.0
General Release Specification
MOTOROLA
General Description
23
NON-DISCLOSURE
AGREEMENT
REQUIRED
1.4.10 TCAP
This pin is used for the16-bit timer input capture operation. Depending
on the value of the IEDG bit in the timer control register (TCR), the
appropriate level of transition on TCAP will be monitored. When the
correct level of transition has occurred, the free-running counter will be
transferred to the input capture register.
1.4.11 FinT and FinR
These pins are inputs to the PLL transmit and the receive counters,
respectively. They typically are driven by the loop VCO and are also AC-
coupled. The minimum input signal level is 200 mV peak to peak
@ 60.0 MHz.
1.4.12 PDoutT and PDoutR
These PLL pins are 3-state outputs of the transmit and receive phase
detectors, respectively, for use as either loop error signals or phase
detector signals.
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