MOTOROLA
ii
MC68HC05BD3
Paragraph
Number
Page
Number
TITLE
4
RESETS AND INTERRUPTS
4.1
4.1.1
4.1.2
4.1.3
4.1.4
4.2
4.2.1
4.2.2
4.2.2.1
4.2.2.2
4.2.2.3
4.2.2.4
RESETS................................................................................................................4-1
Power-On Reset (POR) ...................................................................................4-1
RESET Pin.......................................................................................................4-1
Illegal Address (ILADR) Reset.........................................................................4-2
Computer Operating Properly (COP) Reset....................................................4-2
INTERRUPTS........................................................................................................4-3
Non-maskable Software Interrupt (SWI)..........................................................4-3
Maskable Hardware Interrupts.........................................................................4-5
External Interrupt (IRQ)..............................................................................4-5
Sync Signal Processor Interrupt.................................................................4-7
M-Bus Interrupts.........................................................................................4-7
Multi-Function Timer Interrupts ..................................................................4-8
5
MULTI-FUNCTION TIMER
5.1
5.2
5.3
MFT Counter Register...........................................................................................5-1
MFT Control and Status Register..........................................................................5-1
COP Watchdog......................................................................................................5-2
6
PULSE WIDTH MODULATION
6.1
6.2
PWM Registers .....................................................................................................6-1
General Operation.................................................................................................6-1
7
M-BUS SERIAL INTERFACE
7.1
7.2
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.2.8
7.3
M-Bus Interface Features......................................................................................7-1
M-Bus Protocol......................................................................................................7-2
START Signal...................................................................................................7-3
Slave Address Transmission............................................................................7-3
Data Transfer....................................................................................................7-4
Repeated START Signal..................................................................................7-4
STOP Signal....................................................................................................7-4
Arbitration Procedure.......................................................................................7-4
Clock Synchronization .....................................................................................7-5
Handshaking....................................................................................................7-5
M-Bus Registers....................................................................................................7-5
TPG