MOTOROLA
x
MC68HC05B6
Rev. 4
LIST OF FIGURES
Figure
Number
Page
Number
TITLE
10-1
10-2
11-1
11-2
11-3
11-4
11-5
11-6
11-7
11-8
11-9
11-10
11-11
11-12
11-13
12-1
12-2
12-3
12-4
12-5
12-6
A-1
A-2
A-3
B-1
B-2
C-1
C-2
C-3
C-4
C-5
C-6
C-7
C-8
C-9
C-10
D-1
D-2
D-3
E-1
E-2
E-3
Programming model.........................................................................................10–1
Stacking order ..................................................................................................10–1
Run I
DD
vs internal operating frequency (4.5V, 5.5V)......................................11–3
Run I
DD
(SM = 1) vs internal operating frequency (4.5V, 5.5V).......................11–3
Wait I
DD
vs internal operating frequency (4.5V, 5.5V)......................................11–3
Wait I
DD
(SM = 1) vs internal operating frequency (4.5V, 5.5V).......................11–4
Increase in I
DD
vs frequency for A/D, SCI systems active, VDD = 5.5V...........11–4
I
DD
vs mode vs internal operating frequency, V
DD
= 5.5V................................11–4
Run I
DD
vs internal operating frequency (3V, 3.6V).........................................11–6
Run I
DD
(SM = 1) vs internal operating frequency (3V,3.6V)...........................11–6
Wait I
DD
vs internal operating frequency (3V, 3.6V).........................................11–6
Wait I
DD
(SM = 1) vs internal operating frequency (3V, 3.6V)..........................11–7
Increase in I
DD
vs frequency for A/D, SCI systems active, V
DD
= 3.6V............11–7
I
DD
vs mode vs internal operating frequency, V
DD
= 3.6V................................11–7
Timer relationship...........................................................................................11–12
52-pin PLCC pinout for the MC68HC05B6.......................................................12–1
64-pin QFP pinout for the MC68HC05B6.........................................................12–2
56-pin SDIP pinout for the MC68HC05B6........................................................12–3
52-pin PLCC mechanical dimensions ..............................................................12–4
64-pin QFP mechanical dimensions.................................................................12–5
56-pin SDIP mechanical dimensions................................................................12–6
MC68HC05B4 block diagram.............................................................................A–2
Memory map of the MC68HC05B4....................................................................A–3
MC68HC05B4 self-check schematic diagram....................................................A–7
MC68HC05B8 block diagram.............................................................................B–2
Memory map of the MC68HC05B8....................................................................B–3
MC68HC705B5 block diagram.......................................................................... C–2
Memory map of the MC68HC705B5................................................................. C–3
Modes of operation flow chart (1 of 2)............................................................... C–9
Modes of operation flow chart (2 of 2)............................................................. C–10
Timing diagram with handshake...................................................................... C–11
EPROM(RAM) parallel bootstrap schematic diagram..................................... C–12
EPROM (RAM) serial bootstrap schematic diagram....................................... C–15
RAM parallel bootstrap schematic diagram..................................................... C–16
EPROM parallel bootstrap loader timing diagram........................................... C–17
RAM parallel loader timing diagram ............................................................... C–18
MC68HC05B16 block diagram.......................................................................... D–3
Oscillator connections....................................................................................... D–4
Memory map of the MC68HC05B16................................................................. D–5
MC68HC705B16 block diagram.........................................................................E–2
Memory map of the MC68HC705B16................................................................E–3
Modes of operation flow chart (1 of 2)..............................................................E–11
TPG