MC68HC05B6
Rev. 4
MOTOROLA
v
TABLE OF CONTENTS
Paragraph
Number
Page
Number
TABLE OF CONTENTS
10
CPU CORE AND INSTRUCTION SET
10.1
10.1.1
10.1.2
10.1.3
10.1.4
10.1.5
10.2
10.2.1
10.2.2
10.2.3
10.2.4
10.2.5
10.2.6
10.3
10.3.1
10.3.2
10.3.3
10.3.4
10.3.5
10.3.6
10.3.7
10.3.8
10.3.9
10.3.10
Registers .........................................................................................................10–1
Accumulator (A) .........................................................................................10–2
Index register (X)........................................................................................10–2
Program counter (PC)................................................................................10–2
Stack pointer (SP)......................................................................................10–2
Condition code register (CCR)...................................................................10–2
Instruction set ..................................................................................................10–3
Register/memory Instructions....................................................................10–4
Branch instructions ....................................................................................10–4
Bit manipulation instructions......................................................................10–4
Read/modify/write instructions...................................................................10–4
Control instructions....................................................................................10–4
Tables.........................................................................................................10–4
Addressing modes.........................................................................................10–11
Inherent....................................................................................................10–11
Immediate ................................................................................................10–11
Direct........................................................................................................10–11
Extended..................................................................................................10–12
Indexed, no offset.....................................................................................10–12
Indexed, 8-bit offset..................................................................................10–12
Indexed, 16-bit offset................................................................................10–12
Relative....................................................................................................10–13
Bit set/clear ..............................................................................................10–13
Bit test and branch...................................................................................10–13
11
ELECTRICAL SPECIFICATIONS
11.1
11.2
11.2.1
11.2.2
11.3
11.4
Absolute maximum ratings ..............................................................................11–1
DC electrical characteristics ............................................................................11–2
I
DD
trends for 5V operation ........................................................................11–3
I
DD
trends for 3.3V operation .....................................................................11–6
A/D converter characteristics...........................................................................11–8
Control timing ................................................................................................11–10
12
MECHANICAL DATA
12.1
12.1.1
12.1.2
MC68HC05B family pin configurations............................................................12–1
52-pin plastic leaded chip carrier (PLCC)..................................................12–1
64-pin quad flat pack (QFP).......................................................................12–2
TPG