參數(shù)資料
型號(hào)： MC68HC68
廠商： Motorola, Inc.
英文描述： Real-Time Clock plus RAM with Serial Interface
中文描述： 實(shí)時(shí)時(shí)鐘加RAM的串行接口
文件頁(yè)數(shù)： 24/26頁(yè)
文件大?。?/td> 342K
代理商： MC68HC68
MC68HC68T1
24
MOTOROLA
TROUBLESHOOTING
1.
The circuit works, but the standby current is well above
the spec. How can the standby current be reduced
a. If using a 32.768 kHz crystal, include a series resistor
in the circuit per Figure 12 of the data sheet. A good
value to start with is 200 k . The signals at XTALout
and XTALin pins should look similar to Figure 23
when the correct value is selected. The sharp, clean
edges on the XTALout pin reduces current on the
totem pole drivers internal to the device.
VBATT
0 V
1 TO 2 V p–p
XTALout
XTALin
APPROXIMATELY 30.52 s
SEE NOTE
NOTE: Refer to item 8.
Figure 23. XTAL Waveforms
b. Connect the LINE pin to something other than VDD
(e.g., VBATT, VSS, VSYS)
c. Ensure that the Power–On–Reset (POR) has a time
constant of at least 100 ms.
d. Ensure that there is a diode from VDD to + 5 V of the
system, in battery–backup applications. See
Application Circuits
.
2.
When power is applied, the clock does not start up nor
does it hold data in the control registers.
Make sure the POR circuit is connected and working.
3.
The clock loses time, but the oscillator is tuned.
Do not make constant accesses to the clock. When a read
or write cycle is started, the clock stops incrementing
time.
4.
When the part s power cycled, the clock oses all time and
data.
Check the battery installation and ensure that a diode is
in the circuit from VDD to + 5 V.
5.
Can a non–rechargeable lithium battery be used
Yes, but the battery must have a large capacity. Careful
attention MUST be given if the end unit needs to be UL
approved. The circuit of Figure 22 is a good start.
6.
Able to read/write data to the RAM but not to the clock reg-
isters, or vice versa.
There is a software problem. There is no internal differ-
ence from reading/writing to the RAM or clock locations.
7.
How is the oscillator tuned
The best way to tune the oscillator is to set the clock out
bits of the Clock Control Register (bits 0, 1, and 2) to
output the primary XTAL frequency (000). The frequency
can then be more accurately measured from the
CLKOUT pin. This prevents the measuring device from
loading the oscillator circuit, which may shift the fre-
quency.
8.
What is the accuracy of the oscillator
The oscillator accuracy is dependent on the quality of the
crystal used. For every 1 ppm variance in crystal fre-
quency, the clock gains or loses 2.6 seconds per month.
25 ppm is a typical spec for a crystal, which translates to
65 seconds per month.
9.
Can the Line pin sense a dc failure
Yes, the Line input is threshold triggered in a window from
one diode drop above and below VDD. If supply is
removed in the low cycle of a sine wave, the internal
network pulls the line pin to within the threshold in a few
milliseconds. In the absence of a dc voltage outside the
VDD
±
0.7 V window, the internal network pulls the signal
to within the window and triggers the interrupt.
10.
Can the VSYS line be more than 0.5 V above VDD
No. There is an ESD protection network that causes a
supply problem with this application.
11.
The CLKOUT, CPUR, and PSE pins do not go inactive
when VDD and VSYS are removed. The CLKOUT, CPUR,
and PSE are not active mmediately when VDD and VSYS
is applied.
The problem is related to the power up procedure
(battery–backup mode or single–supply mode). See
these sections in the data sheet for more information.
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