
Operating Modes and On-Chip Memory
Control Registers
M68HC11K Family
Technical Data
MOTOROLA
Operating Modes and On-Chip Memory
69
$0028
Serial Peripheral
Control Register
(SPCR)
Read:
SPIE
SPE
DWOM
MSTR
CPOL
CPHA
SPR1
SPR0
Write:
Reset:
00
01
U
$0029
Serial Peripheral Status
Register (SPSR)
Read:
SPIF
WCOL
0
MODF
00
Write:
Reset:
00
$002A
Serial Peripheral Data
Register (SPDR)
Read:
Bit 7Bit 6
Bit 5Bit 4
Bit 3Bit 2
Bit 1Bit 0
Write:
Reset:
Undefined after reset
$002B
EPROM Programming
Control Register
(EPROG)(1)
Read:
R
0
ELAT
EXCOL
EXROW
0
EPGM
Write:
Reset:
00
1. Present only in EPROM (711) devices
$002C
Port Pullup Assignment
Register (PPAR)
Read:
0
HPPUE
GPPUE
FPPUE
BPPUE
Write:
Reset:
00
11
$002D
Port G Assignment
Register (PGAR)
Read:
0
PGAR5
PGAR4
PGAR3
PGAR2
PGAR1
PGAR0
Write:
Reset:
00
$002E
System Configuration
Options 3 Register
(OPT3)(2)
Read:
SM
Write:
Reset:
00
2. Not available on M68HC11K4 devices
$002F
Reserved
R
$0030
Analog-to-Digital
Control/Status Register
(ADCTL)
Read:
CCF
0
SCAN
MULT
CD
CC
CB
CA
Write:
Reset:
0
UU
U
$0031
Analog-to-Digital
Results Register 1
(ADR1)
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Undefined after reset
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented
R
= Reserved
U = Undefined
Figure 4-1. Register and Control Bit Assignments (Sheet 5 of 11)