參數(shù)資料
型號: MC68HC11K0VFU2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 43/80頁
文件大小: 420K
代理商: MC68HC11K0VFU2
M68HC11 K Series
MC68HC11KTS/D
MOTOROLA
43
Reset state is mode dependent. In single-chip or bootstrap modes, port B pins are high-impedance in-
puts with selectable internal pull-up resistors. In expanded or test modes, port B pins are high order ad-
dress outputs and PORTB is not in the memory map.
DDB[7:0] —Data Direction for Port B
0 = Corresponding pin configured for input
1 = Corresponding pin configured for output
Reset state is mode dependent. In single-chip or bootstrap modes, port C pins are high-impedance in-
puts with selectable internal pull-up resistors. In expanded or test modes, port C pins are data bus inputs
and outputs and PORTC is not in the memory map. Refer to CWOM bit in OPT2 register description
that follows.
DDC[7:0] —Data Direction for Port C. Refer to CWOM bit in OPT2 register description that follows.
0 = Corresponding pin configured for input
1 = Corresponding pin configured for output
PORTB
—Port B Data
$0004
Bit 7
6
5
4
3
2
1
Bit 0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
S. Chip or
Boot:
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
RESET:
I
I
I
I
I
I
I
I
Expan. or
Test:
ADDR15
ADDR14
ADDR13
ADDR12
ADDR11
ADDR10
ADDR9
ADDR8
DDRB
—Data Direction Register for Port B
$0002
Bit 7
6
5
4
3
2
1
Bit 0
DDB7
DDB6
DDB5
DDB4
DDB3
DDB2
DDB1
DDB0
RESET:
0
0
0
0
0
0
0
0
PORTC
—Port C Data
$0006
Bit 7
6
5
4
3
2
1
Bit 0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
S. Chip or
Boot:
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
RESET:
0
0
0
0
0
0
0
0
Expan. or
Test:
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
DDRC
—Data Direction Register for Port C
$0007
Bit 7
6
5
4
3
2
1
Bit 0
DDC7
DDC6
DDC5
DDC4
DDC3
DDC2
DDC1
DDC0
RESET:
0
0
0
0
0
0
0
0
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