參數(shù)資料
型號: MC68HC11ED0VP3
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 3 MHz, MICROCONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁數(shù): 93/108頁
文件大小: 1672K
代理商: MC68HC11ED0VP3
Serial Peripheral Interface (SPI)
SPI Registers
MC68HC11ED0 — Rev. 1.0
Technical Summary
Serial Peripheral Interface (SPI)
8.3.2 Serial Peripheral Status Register
SPIF — SPI Transfer Complete Flag
This flag is set when an SPI transfer is complete (after eight SCK
cycles in a data transfer). Clear this flag by reading SPSR, then
access SPDR.
0 = No SPI transfer complete or SPI transfer still in progress
1 = SPI transfer complete
WCOL — Write Collision Error Flag
This flag is set if the MCU tries to write data into SPDR while an SPI
data transfer is in progress. Clear this flag by reading SPSR, then
access SPDR.
0 = No write collision error
1 = SPDR written while SPI transfer in progress
Bit 5 — Unimplemented
Always reads 0
MODF — Mode Fault Bit (mode fault terminates SPI operation)
Set when SS is pulled low while MSTR = 1. Cleared by SPSR read
followed by SPCR write.
0 = No mode fault error
1 = SS pulled low in master mode
Bits [3:0] — Unimplemented
Always read 0
Address:
$0029
Bit 7
6
54321
Bit 0
Read:
SPIF
WCOL
MODF
Write:
Reset:
00
000000
= Unimplemented
Figure 8-4. Serial Peripheral Status Register (SPSR)
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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