參數(shù)資料
型號(hào): MC68HC11ED0MP3
廠(chǎng)商: FREESCALE SEMICONDUCTOR INC
元件分類(lèi): 微控制器/微處理器
英文描述: 8-BIT, 3 MHz, MICROCONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁(yè)數(shù): 63/108頁(yè)
文件大?。?/td> 1672K
代理商: MC68HC11ED0MP3
Technical Summary
MC68HC11ED0 — Rev. 1.0
Resets and Interrupts
Resets and Interrupts
The 18 interrupt vectors service 22 interrupt sources (three
non-maskable, 19 maskable). The three non-maskable interrupt sources
are:
XIRQ pin (X-bit interrupt)
Illegal opcode trap
Software interrupt
On-chip peripheral systems generate maskable interrupts, which are
recognized only if the global interrupt mask bit (I) in the condition code
register (CCR) is clear. Maskable interrupts are prioritized according to
a default arrangement; however, any one source can be elevated to the
highest maskable priority position by a software-accessible control
register (HPRIO). HPRIO can be written at any time, provided bit I in the
CCR is set.
Nineteen interrupt sources in the MC68HC11ED0 are subject to
masking by the global interrupt mask bit (bit I in the CCR). In addition to
the global I bit, all of these sources, except the external interrupt (IRQ)
pin, are controlled by local enable bits in the control registers. Most
interrupt sources in M68HC11 devices have separate interrupt vectors;
therefore there is usually no need for software to poll control registers to
determine the cause of an interrupt.
For some interrupt sources, such as the serial communications interface
(SCI) interrupts, the flags are automatically cleared during the normal
course of responding to the interrupt requests. For example, the RDRF
flag in the SCI system is cleared by the automatic clearing mechanism
invoked by a read of the SCI status register while RDRF is set, followed
by a read of the SCI data register. The normal response to an RDRF
interrupt request would be to read the SCI status register to check for
receive errors, then to read the received data from the SCI data register.
These two steps satisfy the automatic clearing mechanism without
requiring any special instructions.
Refer to Table 5-1 for interrupt and reset vector assignments.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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