Memory Map
M68HC11E Family Data Sheet, Rev. 5.1
Freescale Semiconductor
39
2.3.1 RAM and Input/Output Mapping
Hardware priority is built into RAM and I/O mapping. Registers have priority over RAM and RAM has
priority over ROM. When a lower priority resource is mapped at the same location as a higher priority
resource, a read/write of a location results in a read/write of the higher priority resource only. For example,
if both the register block and the RAM are mapped to the same location, only the register block will be
accessed. If RAM and ROM are located at the same position, RAM has priority.
The fully static RAM can be used to store instructions, variables, and temporary data. The direct
addressing mode can access RAM locations using a 1-byte address operand, saving program memory
space and execution time, depending on the application.
RAM contents can be preserved during periods of processor inactivity by two methods, both of which
reduce power consumption. They are:
1.
In the software-based stop mode, the clocks are stopped while VDD powers the MCU. Because
power supply current is directly related to operating frequency in CMOS integrated circuits, only a
very small amount of leakage exists when the clocks are stopped.
2.
In the second method, the MODB/VSTBY pin can supply RAM power from a battery backup or from
a second power supply.
Figure 2-8 shows a typical standby voltage circuit for a standard 5-volt
device. Adjustments to the circuit must be made for devices that operate at lower voltages. Using
the MODB/VSTBY pin may require external hardware, but can be justified when a significant amount
of external circuitry is operating from VDD. If VSTBY is used to maintain RAM contents, reset must
$103E
Reserved
R
$103F
System Configuration Register
(CONFIG)
Read:
NOSEC
NOCOP
ROMON
EEON
Write:
Reset:
0
U
1
U
$103F
System Configuration Register
(CONFIG)(3)
Read:
EE3
EE2
EE1
EE0
NOSEC
NOCOP
EEON
Write:
Reset:
1
U
1
1. Can be written only once in first 64 cycles out of reset in normal modes or at any time during special modes.
2. MC68HC711E9 only
3. MC68HC811E2 only
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented
R
= Reserved
U = Unaffected
I = Indeterminate after reset
Figure 2-7. Register and Control Bit Assignments (Sheet 6 of 6)