Operating Modes and On-Chip Memory
Data Sheet
M68HC11E Family — Rev. 5
58
Operating Modes and On-Chip Memory
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MOTOROLA
Bits [7:5] — Unimplemented
Always read 0
PTCON — Protect CONFIG Register Bit
0 = CONFIG register can be programmed or erased normally.
1 = CONFIG register cannot be programmed or erased.
BPRT[3:0] — Block Protect Bits for EEPROM
When set, these bits protect a block of EEPROM from being programmed or
electronically erased. Ultraviolet light, however, can erase the entire
EEPROM contents regardless of BPRT[3:0] (windowed packages only). Refer
to
Table 2-6
and
Table 2-7
.
When cleared, BPRT[3:0] allow programming and erasure of the associated
block.
2.5.1.2 EPROM and EEPROM Programming Control Register
The EPROM and EEPROM programming control register (PPROG) selects and
controls the EEPROM programming function. Bits in PPROG enable the
programming voltage, control the latching of data to be programmed, and select
the method of erasure (for example, byte, row, etc.).
Address: $1035
Bit 7
6
5
4
3
2
1
Bit 0
Read:
PTCON
BPRT3
BPRT2
BPRT1
BPRT0
Write:
Reset:
0
0
0
1
1
1
1
1
= Unimplemented
Figure 2-16. Block Protect Register (BPROT)
Table 2-6. EEPROM Block Protect
Bit Name
BPRT0
BPRT1
BPRT2
BPRT3
Block Protected
$B600–$B61F
$B620–$B65F
$B660–$B6DF
$B6E0–$B7FF
Block Size
32 bytes
64 bytes
128 bytes
288 bytes
Table 2-7. EEPROM Block Protect in MC68HC811E2 MCUs
Bit Name
Block Protected
Block Size
BPRT0
$x800–$x9FF
(1)
1. x is determined by the value of EE[3:0] in CONFIG register. Refer to
Figure 2-13
.
512 bytes
BPRT1
$xA00–$xBFF
(1)
512 bytes
BPRT2
$xC00–$xDFF
(1)
512 bytes
BPRT3
$xE00–$xFFF
(1)
512 bytes
F
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n
.