Operating Modes and On-Chip Memory
Memory Map
M68HC11E Family — Rev. 5
Data Sheet
MOTOROLA
Operating Modes and On-Chip Memory
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47
IRV(NE) — Internal Read Visibility (Not E) Bit
IRVNE can be written once in any mode. In expanded modes, IRVNE
determines whether IRV is on or off. In special test mode, IRVNE is reset to 1.
In all other modes, IRVNE is reset to 0. For the MC68HC811E2, this bit is IRV
and only controls the internal read visibility function.
0 = No internal read visibility on external bus
1 = Data from internal reads is driven out the external data bus.
In single-chip modes this bit determines whether the E clock drives out from the
chip. For the MC68HC811E2, this bit has no meaning or effect in single-chip and
bootstrap modes.
0 = E is driven out from the chip.
1 = E pin is driven low. Refer to the following table.
PSEL[3:0] — Priority Select Bits
Refer to
Section 5. Resets and Interrupts
.
2.3.3 System Initialization
Registers and bits that control initialization and the basic operation of the MCU are
protected against writes except under special circumstances.
Table 2-2
lists
registers that can be written only once after reset or that must be written within the
first 64 cycles after reset.
Mode
IRVNE Out
of Reset
0
0
0
1
E Clock Out
of Reset
On
On
On
On
IRV Out
of Reset
Off
Off
Off
On
IRVNE
Affects Only
E
IRV
E
IRV
IRVNE Can
Be Written
Once
Once
Once
Once
Single chip
Expanded
Bootstrap
Special test
Table 2-2. Write Access Limited Registers
Operating
Mode
SMOD = 0
Register
Address
$x024
$x035
$x039
Register Name
Must be Written
in First 64 Cycles
Bits [1:0], once only
Clear bits, once only
Bits [5:4], bits [2:0], once only
Write
Anytime
Timer interrupt mask 2 (TMSK2)
Block protect register (BPROT)
System configuration options (OPTION)
Highest priority I-bit interrupt
and miscellaneous (HPRIO)
RAM and I/O map register (INIT)
Timer interrupt mask 2 (TMSK2)
Block protect register (BPROT)
System configuration options (OPTION)
Highest priority I-bit interrupt and
miscellaneous (HPRIO)
RAM and I/O map register (INIT)
Bits [7:2]
Set bits only
Bits [7:6], bit 3
$x03C
See HPRIO description
See HPRIO description
$x03D
$x024
$x035
$x039
Yes, once only
—
SMOD = 1
—
—
—
All, set or clear
All, set or clear
All, set or clear
$x03C
See HPRIO description
See HPRIO description
$x03D
—
All, set or clear
F
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.