參數(shù)資料
型號： MC68HC11A1CP2
廠商： ABILIS SYSTEMS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP48
封裝： PLASTIC, DIP-48
文件頁數(shù)： 4/158頁
文件大小： 3803K
代理商： MC68HC11A1CP2
CPU, ADDRESSING MODES, AND INSTRUCTION SET
MOTOROLA
TECHNICAL DATA
10-3
10
10.1.6.1 Carry/Borrow (C)
The C bit is set if there was a carry or borrow out of the arithmetic logic unit (ALU) dur-
ing the last arithmetic operation. The C bit is also affected during shift and rotate in-
structions.
10.1.6.2 Overflow (V)
The overflow bit is set if there was an arithmetic overflow as a result of the operation;
otherwise, the V bit is cleared.
10.1.6.3 Zero (Z)
The zero bit is set if the result of the last arithmetic, logic, or data manipulation opera-
tion was zero; otherwise, the Z bit is cleared.
10.1.6.4 Negative (N)
The negative bit is set if the result of the last arithmetic, logic, or data manipulation op-
eration was negative; otherwise, the N bit is cleared. A result is said to be negative if
its most significant bit is a one.
10.1.6.5 Interrupt Mask (I)
The I interrupt mask bit is set either by hardware or program instruction to disable
(mask) all maskable interrupt sources (both external and internal).
10.1.6.6 Half Carry (H)
The half carry bit is set to a logic one when a carry occurs between bits 3 and 4 of the
arithmetic logic unit during an ADD, ABA, or ADC instruction; otherwise, the H bit is
cleared.
10.1.6.7 X Interrupt Mask (X)
The X interrupt mask bit is set only by hardware (RESET or XIRQ acknowledge); and
it is cleared only by program instruction (TAP or RTI).
10.1.6.8 Stop Disable (S)
The stop disable bit is set to disable the STOP instruction, and cleared to enable the
STOP instruction. The S bit is program controlled. The STOP instruction is treated as
no operation (NOP) if the S bit is set.
10.2 Addressing Modes
Six addressing modes can be used to reference memory; they include: immediate, di-
rect, extended, indexed (with either of two 16-bit index registers and an 8-bit offset),
inherent and relative. Some instructions require an additional byte before the opcode
to accommodate a multi-page opcode map; this byte is called a prebyte.
The following paragraphs provide a description of each addressing mode plus a dis-
cussion of the prebyte. In these descriptions the term effective address is used to in-
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC11A1CP3 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS Single-Chip Microcontroller
MC68HC11A1FN 制造商: 功能描述:
MC68HC11A1MFN 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:8-Bit Microcontrollers
MC68HC11A1MFN2 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS Single-Chip Microcontroller
MC68HC11A1MFNE 功能描述:8位微控制器 -MCU 8B MCU 256RAM A/D EE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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