參數(shù)資料
型號: MC68HC08QY2VDT
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO16
封裝: 0.65 MM PITCH, TSSOP-16
文件頁數(shù): 32/178頁
文件大小: 2311K
代理商: MC68HC08QY2VDT
Registers
MC68HC08QY/QT Family Data Sheet, Rev. 1
Freescale Semiconductor
127
If another TIM overflow occurs before the clearing sequence is complete, then writing 0 to TOF has no
effect. Therefore, a TOF interrupt request cannot be lost due to inadvertent clearing of TOF. Writing
a 1 to TOF has no effect.
1 = Counter has reached modulo value
0 = Counter has not reached modulo value
TOIE — TIM Overflow Interrupt Enable Bit
This read/write bit enables TIM overflow interrupts when the TOF bit becomes set.
1 = TIM overflow interrupts enabled
0 = TIM overflow interrupts disabled
TSTOP — TIM Stop Bit
This read/write bit stops the counter. Counting resumes when TSTOP is cleared. Reset sets the
TSTOP bit, stopping the counter until software clears the TSTOP bit.
1 = Counter stopped
0 = Counter active
NOTE
Do not set the TSTOP bit before entering wait mode if the TIM is required
to exit wait mode. Also, when the TSTOP bit is set and the timer is
configured for input capture operation, input captures are inhibited until the
TSTOP bit is cleared.
TRST — TIM Reset Bit
Setting this write-only bit resets the counter and the TIM prescaler. Setting TRST has no effect on any
other timer registers. Counting resumes from $0000. TRST is cleared automatically after the counter
is reset and always reads as 0.
1 = Prescaler and counter cleared
0 = No effect
NOTE
Setting the TSTOP and TRST bits simultaneously stops the counter at a
value of $0000.PS[2:0] — Prescaler Select Bits
These read/write bits select one of the seven prescaler outputs as the input to the counter as
Table 14-1. Prescaler Selection
PS2
PS1
PS0
TIM Clock Source
0
Internal bus clock
÷ 1
0
1
Internal bus clock
÷ 2
0
1
0
Internal bus clock
÷ 4
0
1
Internal bus clock
÷ 8
1
0
Internal bus clock
÷ 16
1
0
1
Internal bus clock
÷ 32
1
0
Internal bus clock
÷ 64
1
TCLK (if available)
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