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    參數(shù)資料
    型號: MC68HC08QT2CDW
    廠商: FREESCALE SEMICONDUCTOR INC
    元件分類: 微控制器/微處理器
    英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO8
    封裝: EIAJ, SOIC-8
    文件頁數(shù): 118/178頁
    文件大?。?/td> 2311K
    代理商: MC68HC08QT2CDW
    10-Bit Analog-to-Digital Converter (ADC10) Module
    MC68HC08QY/QT Family Data Sheet, Rev. 1
    44
    Freescale Semiconductor
    ADLSMP — Long Sample Time Configuration
    This bit configures the sample time of the ADC10 to either 3.5 or 23.5 ADCK clock cycles. This adjusts
    the sample period to allow higher impedance inputs to be accurately sampled or to maximize
    conversion speed for lower impedance inputs. Longer sample times can also be used to lower overall
    power consumption in continuous conversion mode if high conversion rates are not required.
    1 = Long sample time (23.5 cycles)
    0 = Short sample time (3.5 cycles)
    ACLKEN — Asynchronous Clock Source Enable
    This bit enables the asynchronous clock source as the input clock to generate the internal clock ADCK,
    and allows operation in stop mode. The asynchronous clock source will operate between 1 MHz and
    2 MHz if ADLPC is clear, and between 0.5 MHz and 1 MHz if ADLPC is set.
    1 = The asynchronous clock is selected as the input clock source (the clock generator is only
    enabled during the conversion)
    0 = ADICLK specifies the input clock source and conversions will not continue in stop mode
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