
Serial Peripheral Interface (SPI)
MC68HC08AZ32A Data Sheet, Rev. 2
230
Freescale Semiconductor
16.12.1 SPI Control Register (SPCR)
The SPI control register does the following:
Enables SPI module interrupt requests
Selects CPU interrupt requests
Configures the SPI module as master or slave
Selects serial clock polarity and phase
Configures the SPSCK, MOSI, and MISO pins as open-drain outputs
Enables the SPI module
SPRIE — SPI Receiver Interrupt Enable
This read/write bit enables CPU interrupt requests generated by the SPRF bit. The SPRF bit is set
when a byte transfers from the shift register to the receive data register. Reset clears the SPRIE bit.
1 = SPRF CPU interrupt requests enabled
0 = SPRF CPU interrupt requests disabled
SPMSTR — SPI Master
This read/write bit selects master mode operation or slave mode operation. Reset sets the SPMSTR
bit.
1 = Master mode
0 = Slave mode
CPOL — Clock Polarity
This read/write bit determines the logic state of the SPSCK pin between transmissions. See
identical CPOL bits. Reset clears the CPOL bit.
CPHA — Clock Phase
This read/write bit controls the timing relationship between the serial clock and SPI data. See
Figure16-5 and
Figure 16-6. To transmit data between SPI modules, the SPI modules must have identical
CPHA bits. When CPHA = 0, the SS pin of the slave SPI module must be set to logic one between
When CPHA = 0 for a slave, the falling edge of SS indicates the beginning of the transmission. This
causes the SPI to leave its idle state and begin driving the MISO pin with the MSB of its data. Once
the transmission begins, no new data is allowed into the shift register from the data register. Therefore,
the slave data register must be loaded with the desired transmit data before the falling edge of SS. Any
data written after the falling edge is stored in the data register and transferred to the shift register at
the current transmission.
Address: $0010
Bit 7
654321
Bit 0
Read:
SPRIE
R
SPMSTR
CPOL
CPHA
SPWOM
SPE
SPTIE
Write:
Reset:
00101000
R= Reserved
Figure 16-13. SPI Control Register (SPCR)