MOTOROLA
x
MC68HC05X16
Rev. 1
LIST OF FIGURES
Figure
Number
Page
Number
TITLE
7-10
8-1
8-2
8-3
9-1
9-2
10-1
10-2
10-3
10-4
11-1
11-2
12-1
13-1
13-2
A-1
A-2
A-3
B-1
B-2
B-3
B-4
B-5
B-6
B-7
B-8
B-9
SCI data clock timing diagram (M=1)......................................................................7-13
PLM system block diagram .....................................................................................8-1
PLM output waveform examples.............................................................................8-2
PLM clock selection ................................................................................................8-4
A/D converter block diagram...................................................................................9-2
Electrical model of an A/D input pin........................................................................9-6
Reset timing diagram ............................................................................................10-1
RESET external RC pull-down..............................................................................10-3
Watchdog system block diagram...........................................................................10-4
Interrupt flow chart ................................................................................................10-8
Programming model..............................................................................................11-1
Stacking order.......................................................................................................11-2
Timer relationship..................................................................................................12-5
64-pin QFP pinout.................................................................................................13-1
64-pin QFP mechanical dimensions .....................................................................13-2
MC68HC05X32 block diagram............................................................................... A-2
Memory map of the MC68HC05X32...................................................................... A-3
Timer relationship................................................................................................... A-11
MC68HC705X32 block diagram............................................................................. B-3
Memory map of the MC68HC705X32.................................................................... B-5
Modes of operation flow chart................................................................................ B-15
Timing diagram with handshake............................................................................. B-18
Parallel EPROM loader timing diagram.................................................................. B-18
EPROM parallel bootstrap schematic diagram ...................................................... B-19
RAM load and execute schematic diagram............................................................ B-21
Parallel RAM loader timing diagram....................................................................... B-22
Timer relationship................................................................................................... B-27