參數(shù)資料
型號: MC68HC05P9AVP
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: HCMOS Microcontroller Unit
中文描述: HCMOS微控制器
文件頁數(shù): 125/158頁
文件大?。?/td> 1106K
代理商: MC68HC05P9AVP
ADC
Low-Power Modes
MOTOROLA
ADC
125
ADC Data Register
The ADC data register (ADDR) is a read-only register that contains the
result of the most recent analog-to-digital conversion.
Low-Power Modes
Stop Mode
The STOP instruction turns off the ADC and aborts any current and
pending conversions.
Wait Mode
The ADC continues to operate normally after the WAIT instruction. To
reduce power consumption in wait mode:
If the ADC is not being used, clear both the ADON and ADRC bits
before entering wait mode.
If the ADC is being used and the internal clock rate is above
1 MHz, clear the ADRC bit before entering wait mode.
$001D
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
Unaffected by reset
Figure 69. ADC Data Register (ADDR)
13-mc68hc05p9a
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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