參數(shù)資料
型號(hào): MC68HC05P9AP
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28
封裝: PLASTIC, DIP-28
文件頁(yè)數(shù): 80/90頁(yè)
文件大?。?/td> 285K
代理商: MC68HC05P9AP
GENERAL RELEASE SPECIFICATION
MC68HC05P9A
ELECTRICAL SPECIFICATIONS
MOTOROLA
Rev. 2.0
13-7
Figure 13-2. STOP Recovery Timing
Figure 13-3. External Interrupt Timing
1FFF
1FFE
4
RESET OR INTERRUPT
VECTOR FETCH
INTERNAL
CLOCK
IRQ 3
OSC 1
IRQ 2
INTERNAL
ADDRESS
BUS
RESET
NOTES:
1. Represents the internal clocking of the OSC1 pin.
2. IRQ pin edge–sensitive mask option.
3. IRQ pin level– and edge–sensitive mask option.
4. RESET vector address shown for timing example.
tRL
tILIH
4064
tcyc
ILIH
t
ILIL
t
ILIH
t
NORMALLY
USED WITH
WIRE–ORed
CONNECTION
Edge - Sensit ive Trigger Condition
The minimum pulse width (
t
)is
either 125 ns (V
= 5 V) or 250 ns
(V
= 3 V). The period
t
should
not be less than the number of
t
cycles it takes to execute the interr upt
service routine plus 19
t
cycles.
DD
ILIH
ILIL
cyc
Level - Sensitive Trigger Condition
If after ser vicing an interrupt the IRQ
remains low, then the next interrupt is
recognized.
IRQ (PIN)
IRQn
IRQ1
RQ (MCU)
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