參數(shù)資料
型號: MC68HC05P9ACP
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28
封裝: PLASTIC, DIP-28
文件頁數(shù): 129/158頁
文件大?。?/td> 3885K
代理商: MC68HC05P9ACP
Parallel I/O Ports
72
Parallel I/O Ports
Figure 34. Port B I/O Logic
Writing a logic 1 to a DDRB bit enables the output buffer for the
corresponding port B pin; a logic 0 disables the output buffer.
When bit DDRBx is a logic 1, reading address $0001 reads the PBx data
latch. When bit DDRBx is a logic 0, reading address $0001 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit. Table 16 summarizes the operation
of the port B pins.
1. Hi-Z = high impedance
2. Writing affects data register, but does not affect input.
Table 16. Port B Pin Operation
Data Direction Bit
I/O Pin Mode
Accesses to Data Bit
Read
Write
0
Input, Hi-Z(1)
Pin
Latch(2)
1
Output
Latch
READ DATA DIRECTION REGISTER B ($0005)
WRITE DATA DIRECTION REGISTER B ($0005)
RESET
WRITE PORT B DATA REGISTER ($0001)
READ PORT B DATA REGISTER ($0001)
PBx
INTERNAL
D
AT
A
B
US
PBx
DDRBx
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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