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參數(shù)資料
| 型號： | MC68HC05J5AJP |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 85/113頁 |
| 文件大?。?/td> | 1212K |
| 代理商： | MC68HC05J5AJP |
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July 16, 1999
GENERAL RELEASE SPECIFICATION
MC68HC05J5A
INSTRUCTION SET
MOTOROLA
REV 2.1
10-5
10.1.11 Read-Modify-Write Instructions
These instructions read a memory location or a register, modify its contents, and
write the modied value back to the memory location or to the register. The test for
negative or zero instruction (TST) is an exception to the read-modify-write
sequence because it does not write a replacement value. Table 10-2 lists the
read-modify-write instructions.
10.1.12 Jump/Branch Instructions
Jump instructions allow the CPU to interrupt the normal sequence of the program
counter. The unconditional jump instruction (JMP) and the jump to subroutine
instruction (JSR) have no register operand. Branch instructions allow the CPU to
interrupt the normal sequence of the program counter when a test condition is
met. If the test condition is not met, the branch is not performed. All branch
instructions use relative addressing.
Bit test and branch instructions cause a branch based on the state of any
readable bit in the rst 256 memory locations. These three-byte instructions use a
combination of direct addressing and relative addressing. The direct address of
the byte to be tested is in the byte following the opcode. The third byte is the
signed offset byte. The CPU nds the conditional branch destination by adding the
Table 10-2. Read-Modify-Write Instructions
Instruction
Mnemonic
Arithmetic Shift Left
ASL
Arithmetic Shift Right
ASR
Clear Bit in Memory
BCLR
Set Bit in Memory
BSET
Clear
CLR
Complement (One’s Complement)
COM
Decrement
DEC
Increment
INC
Logical Shift Left
LSL
Logical Shift Right
LSR
Negate (Two’s Complement)
NEG
Rotate Left through Carry Bit
ROL
Rotate Right through Carry Bit
ROR
Test for Negative or Zero
TST
相關PDF資料 |
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| MC68HC05J5AP | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP20 |
| MICD-038-03.75-TTR-TTL-1-S | INTERCONNECTION DEVICE |
| MICD-038-03.75-TTR-TTL-3-B | INTERCONNECTION DEVICE |
| MICD-038-03.75-TTR-TTR-1-S | INTERCONNECTION DEVICE |
| MICD-038-03.75-TTR-TTR-2-B | INTERCONNECTION DEVICE |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05J5AP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:8-bit microcontroller units |
| MC68HC05JJ6 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification Microcontrollers |
| MC68HC05JJ6CDW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification Microcontrollers |
| MC68HC05JJ6CDWE | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification Microcontrollers |
| MC68HC05JJ6CP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification Microcontrollers |
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