參數(shù)資料
型號: MC68HC05CT4FN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.048 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 83/142頁
文件大?。?/td> 624K
代理商: MC68HC05CT4FN
MC68HC05CT4
Rev.
2.0
General
Release
Specification
MOTOROLA
Resets
45
Resets
External
Reset
(RESET)
NON-DISCLOSURE
AGREEMENT
REQUIRED
PCH
PCL
OSC12
RESET
INTERNAL
PROCESSOR
INTERNAL
ADDRESS
BUS1
1FFE
1FFF
V
DD
4064 t
CYC
t
CYC
t
RL
INTERNAL
DATA
BUS1
1FFE
NEW
1FFF
NOTES:
1. Internal timing signal and bus information not available externally
2. OSC1 line is not meant to represent frequency. It is only used to represent time.
3. The next rising edge of the internal processor clock following the rising edge of RESET initiates the reset sequence.
4. VDD must fall to a level lower than VPOR to be recognized as a power-on reset.
3
NEW
OP
CODE
PCL
PCH
NEW
OP
CODE
NEW
CLOCK1
0 V
> VPOR 4
Figure 5-2. RESET and POR Timing Diagram
PC
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