- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄201872 > MC68HC05C9ACB (FREESCALE SEMICONDUCTOR INC) 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42 PDF資料下載
參數(shù)資料
| 型號： | MC68HC05C9ACB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42 |
| 封裝： | SHRINK, PLASTIC, DIP-42 |
| 文件頁數(shù)： | 145/160頁 |
| 文件大?。?/td> | 4128K |
| 代理商： | MC68HC05C9ACB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁當前第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁
Serial Communications Interface (SCI)
SCI I/O Registers
MC68HC05C9A — Rev. 4.0
General Release Specification
Serial Communications Interface (SCI)
NON-DISCLOSURE
AGREEMENT
REQUIRED
the SCDR. Reset sets the TC bit. Software must initialize the TC bit
to logic zero to avoid an instant interrupt request when turning the
transmitter on.
1 = No transmission in progress
0 = Transmission in progress
RDRF — Receive Data Register Full
This clearable, read-only flag is set when the data in the receive shift
register transfers to the SCI data register. RDRF generates an
interrupt request if the RIE bit in the SCCR2 is also set. Clear the
RDRF bit by reading the SCSR with RDRF set and then reading the
SCDR.
1 = Received data available in SCDR
0 = Received data not available in SCDR
IDLE — Receiver Idle
This clearable, read-only flag is set when 10 or 11 consecutive logic
ones appear on the receiver input. IDLE generates an interrupt
request if the ILIE bit in the SCCR2 is also set. Clear the ILIE bit by
reading the SCSR with IDLE set and then reading the SCDR.
1 = Receiver input idle
0 = Receiver input not idle
OR — Receiver Overrun
This clearable, read-only flag is set if the SCDR is not read before the
receive shift register receives the next word. OR generates an
interrupt request if the RIE bit in the SCCR2 is also set. The data in
the shift register is lost, but the data already in the SCDR is not
affected. Clear the OR bit by reading the SCSR with OR set and then
reading the SCDR.
1 = Receive shift register full and RDRF = 1
0 = No receiver overrun
NF — Receiver Noise Flag
This clearable, read-only flag is set when noise is detected in data
received in the SCI data register. Clear the NF bit by reading the
SCSR and then reading the SCDR.
1 = Noise detected in SCDR
0 = No noise detected in SCDR
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
相關PDF資料 |
PDF描述 |
|---|---|
| MC68HC05C9ACFB | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| MC68HC05C9ACFN | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44 |
| MC68HC908EY16AKFA | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP32 |
| MC68HC908EY16AVFA | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP32 |
| MB91613PMC | 32-BIT, FLASH, 33 MHz, RISC MICROCONTROLLER, PQFP120 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05C9AFB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05C9AFN | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05C9AMB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05C9AMFB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05C9AMFN | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
發(fā)布緊急采購，3分鐘左右您將得到回復。