MC68HC05B6
Rev. 4.1
Freescale
F-15
MC68HC705B16N
14
Figure F-7 EPROM parallel bootstrap schematic diagram
VCC
28
1
VPP PGM
27
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
VDD
OSC1
OSC2
TCAP1
IRQ
RESET
VSS
A0
A1
A2
A3
A4
A5
A6
A7
D0
D1
D2
D3
D4
D5
D6
D7
GND
OE
14
22
10
9
8
7
6
5
4
26
12
13
15
16
17
18
19
11
3
+5V
1
2
P1
GND
+5V
100
F
22pF
4.0 MHz
1N914
1k
1.0
F
22pF
100k
1N914
RESET
RUN
0.01
F
TDO
SCLK
RDI
VRL
TCAP2
PD7
PD6
PD5
PD3
PD2
PD1
PD0
PD4
+5V
3
VPP
VPP6
PC7
PC5
PC4
PC3
PC2
PC1
PC0
PC6
24
21
23
2
A9
A8
A10
A12
CE
A11
A12
A11
A10
A9
A8
HDSK out
HDSK in
Short circuit if
handshake not used
100 k
NC
TCMP1
TCMP2
PLMA
PLMB
470
470
red LED
green LED
4k7
4k7
12 k
BC239C
B
C
309
C
10k
27C256
+
VRH
red LED — programming failed
green LED — programming OK
25
1nF
1N581
9
1 k
+
EPROM
green LED — EPROM erased
47
F
+
Erase verify & boot
EPROM
check
VPP1
red LED — EPROM not erased
Boot
Erase check
A13
20
MC68HC705B16N
MCU
A14
Note:
This circuit is recommended for programming only at 25
°C and not for use in the
end application, or at temperatures other than 25
°C. If used in the end application,
VPP6 should be tied to VDD to avoid damaging the device.
EPROM verify
Erase check
& boot
(EPROM only)
Erase check &
boot (EPROM
& EEPROM)
