參數(shù)資料
型號: MC68HC000FN20
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: Addendum to M68000 User Manual
中文描述: 32-BIT, 20 MHz, MICROPROCESSOR, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 12/26頁
文件大?。?/td> 124K
代理商: MC68HC000FN20
12
M68000 USER’S MANUAL ADDENDUM
MOTOROLA
7.0 MC68SEC000 AC ELECTRICAL SPECIFICATIONS — READ AND
WRITE CYCLES
Add the following table and Figures 9 and 10 to Section 10.16.
Applies to 3.3V and 5V.
(GND = 0 V; T
A
= T
L
to T
H
; see Figures 3 and 4)
NUM
CHARACTERISTIC
10MHz
MIN
0
16MHz
MIN
0
20MHz
MIN
0
UNIT
MAX
35
35
55
MAX
30
30
50
MAX
25
25
42
6
Clock Low to Address Valid
Clock High to FC Valid
Clock High to Address, Data Bus High Impedance (Maximum)
(Write)
Clock High to Address, FC Invalid (Minimum)
Clock High to AS, LDS, UDS Asserted
ns
ns
ns
6A
7
8
0
3
35
0
3
30
0
3
25
ns
ns
9
1
11
2
Address Valid to AS, LDS, UDS Asserted (Read)/ AS Asserted
(Write)
FC Valid to AS, LDS, UDS Asserted (Read)/ AS Asserted (Write)
20
15
10
ns
11A
2
45
45
40
ns
12
1
Clock Low to AS, LDS, UDS Negated
3
35
3
30
3
25
ns
13
2
AS, LDS, UDS Negated to Address, FC Invalid
15
15
10
ns
14
2
AS (and LDS, UDS Read) Width Asserted
195
120
100
ns
14A
2
LDS, UDS Width Asserted (Write)
95
60
50
ns
15
16
2
AS, LDS, UDS Width Negated
105
60
50
ns
Clock High to Control Bus High Impedance
AS, LDS, UDS Negated to R/W Invalid
15
55
15
50
10
42
ns
ns
17
2
18
1
Clock High to R/W High (Read)
0
35
0
30
0
25
ns
20
1
Clock High to R/W Low (Write)
0
35
0
30
0
25
ns
20A
2,6
AS Asserted to R/W Low (Write)
10
10
10
ns
21
2
Address Valid to R/W Low (Write)
0
0
0
ns
21A
2
FC Valid to R/W Low (Write)
50
30
25
ns
22
23
2
R/W Low to DS Asserted (Write)
50
30
25
ns
Clock Low to Data-Out Valid (Write)
AS, LDS, UDS Negated to Data-Out Invalid (Write)
30
35
15
30
10
25
ns
ns
25
2
26
2
Data-Out Valid to LDS, UDS Asserted (Write)
30
15
10
ns
27
5
Data-In Valid to Clock Low (Setup Time on Read)
5
5
5
ns
28
28A
2
AS, LDS, UDS Negated to DTACK Negated (Asynchronous Hold)
0
110
0
110
0
95
ns
Clock High to DTACK Negated
0
110
0
110
0
95
ns
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PDF描述
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