8- 8
MC68000 8-/16-/32-MICROPROCESSORS UISER'S MANUAL
MOTOROLA
8.9 JMP, JSR, LEA, PEA, AND MOVEM INSTRUCTION
EXECUTION TIMES
Table 8-10 lists the timing data for the jump (JMP), jump to subroutine (JSR), load
effective address (LEA), push effective address (PEA), and move multiple registers
(MOVEM) instructions. The total number of clock periods, the number of read cycles, and
the number of write cycles are shown in the previously described format.
Table 8-10. JMP, JSR, LEA, PEA, and MOVEM Instruction Execution Times
Instruction
Size
(An)
(An)+
–(An)
(d 16 ,An) (d 8,An,Xn)+
(xxx).W
(xxx).L
(d 16 PC)
(d 8, PC, Xn)*
JMP
—
8(2/0)
—
10 (2/0)
14 (3/0)
10 (2/0)
12 (3/0)
10 (2/0)
14 (3/0)
JSR
—
16 (2/2)
—
18 (2/2)
22 (2/2)
18 (2/2)
20 (3/2)
18 (2/2)
22 (2/2)
LEA
—
4(1/0)
—
8(2/0)
12 (2/0)
8(2/0)
12 (3/0)
8(2/0)
12 (2/0)
PEA
—
12 (1/2)
—
16 (2/2)
20 (2/2)
16 (2/2)
20 (3/2)
16 (2/2)
20 (2/2)
MOVEM
M
→ R
Word
12+4n
(3+n/0)
12+4n
(3+n/0)
—
16+4n
(4+n/0)
18+4n
(4+n/0)
16+4n
(4+n/0)
20+4n
(5+n/0)
16+4n
(4n/0)
18+4n (4+n/0)
Long
12+8n
(3+2n/0)
12+8n
(3+n/0)
—
16+8n
(4+2n/0)
18+8n
(4+2n/0)
16+8n
(4+2n/0)
20+8n
(5+2n/0)
16+8n
(4+2n/0)
18+8n
(4+2n/0)
MOVEM
R
→ M
Word
8+4n
(2/n)
—
8+4n
(2/n)
12+4n
(3/n)
14+4n
(3/n)
12+4n
(3/n)
16+4n
(4/n)
—
Long
8+8n
(2/2n)
—
8+8n
(2/2n)
12+8n
(3/2n)
14+8n
(3/2n)
12+8n
(3/2n)
16+8n
(4/2n)
—
n is the number of registers to move.
*The size of the index register (Xn) does not affect the instruction's execution time.
8.10 MULTIPRECISION INSTRUCTION EXECUTION TIMES
Table 8-11 lists the timing data for multiprecision instructions. The number of clock periods
includes the time to fetch both operands, perform the operations, store the results, and
read the next instructions. The total number of clock periods, the number of read cycles,
and the number of write cycles are shown in the previously described format.
The following notation applies in Table 8-11:
Dn — Data register operand
M — Memory operand
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