
9- 14
M68040 USER’S MANUAL
MOTOROLA
ENTRY
INEX2 ± 1
GUARD ± 0
ROUND ± 0
STICKY ± 0
EXIT
GUARD, ROUND,
AND STICKY ARE
CHOPPED
SHIFT MANTISSA
RIGHT 1 BIT,
ADD 1 TO EXPONENT
ADD 1 TO
LSB
SELECT ROUNDING MODE
GUARD AND LSB = 1,
ROUND AND STICKY = 0
OR
GUARD = 1
ROUND OR STICKY = 1
INTERMEDIATE
RESULT
OVERFLOW = 1
GUARD, ROUND,
AND STICKY BITS = 0
EXACT RESULT
RP
RM
RN
RZ
ADD 1 TO
LSB
INTERMEDIATE
RESULT
POS
NEG POS
NEG
Figure 9-8. Rounding Algorithm Flowchart
The three additional bits beyond the extended-precision format, the difference between
the intermediate result’s 67-bit mantissa and the stored result’s 64-bit mantissa, allow the
FPU to perform all calculations as though it were performing calculations using a float
engine with infinite bit precision. The result is always correct for the specified destination’s
data format before performing rounding (unless an overflow or underflow error occurs).
The specified rounding operation then produces a number that is as close as possible to
the infinitely precise intermediate value and still representable in the selected precision.