Section
11
11.1
11.2
12
12.1
12.2
13
13.1
13.2
13.3
13.4
14
14.1
14.2
14.3
14.4
14.5
15
15.1
15.2
15.3
16
16.1
16.2
16.3
16.4
Page
TABLE OF CONTENTS (Continued)
MOTOROLA
4
MC68HC912B32
MC68HC912B32TS/D
Pulse-Width Modulator
PWM Register Description ........................................................................................................65
PWM Boundary Cases ..............................................................................................................72
Standard Timer Module
Timer Registers .........................................................................................................................74
Timer Operation in Modes .........................................................................................................82
Serial Interface
Block Diagram ...........................................................................................................................83
Serial Communication Interface (SCI) .......................................................................................83
Serial Peripheral Interface (SPI) ................................................................................................90
Port S ........................................................................................................................................96
Byte Data Link Communications Module (BDLC)
Features ....................................................................................................................................98
BDLC Operating Modes ............................................................................................................98
Loopback Modes .......................................................................................................................99
BDLC Registers .........................................................................................................................99
J1850 Bus Errors .....................................................................................................................106
Analog-To-Digital Converter
Functional Description .............................................................................................................108
ATD Registers .........................................................................................................................108
ATD Mode Operation ..............................................................................................................114
Development Support
Instruction Queue ....................................................................................................................115
Background Debug Mode ........................................................................................................115
Breakpoints .............................................................................................................................123
Instruction Tagging ..................................................................................................................127
63
73
83
98
108
115