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MC68882 Product Summary Page
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MC68882 : Math Coprocessor
The MC68882 floating-point coprocessor (FPCP) fully implements the IEEE Standard for Binary
Floating-Point Arithmetic (ANSI-IEEE Std 754-1985) for use with the Motorola M68000 Family of
microprocessors. The MC68882 provides an increased level of performance in a coprocessor that is
fully compatible and physically interchangeable with the MC68881.
Intended primarily for use as a coprocessor to the MC68020/MC68030 32-bit microprocessor, the
MC68882 provides a logical extension to the main processing unit integer data processing
capabilities. This coprocessor provides a very high performance floating-point arithmetic unit and a
set of floating-point data registers utilized in a manner that is analogous to the use of the integer
data registers. The MC68882 instruction set, a natural extension of all earlier members of the
M68000 Family, supports all of the addressing modes of the host MPU.
MC68882 Features
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8 general-purpose floating-point data registers, each supporting a full 80-bit extended precision real data format (a 64-bit
mantissa plus a sign bit, and a 15-bit signed exponent).
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67-bit arithmetic unit to allow very fast calculations, with intermediate precision greater than the extended precision format.
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67-bit barrel shifter for high-speed shifting operations (for normalizing, etc.).
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46 instructions, including 35 arithmetic operations.
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Full conformance to the ANSI-IEEE 754-1985 standard, including all requirements and suggestions.
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Support of functions not defined by the IEEE standard, including a full set of trigonometric and transcendental functions.
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7 data formats: byte, word, and long word integers; single, double, and extended precision real numbers; and packed binary
coded decimal string real numbers.
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22 constants available in the on-chip ROM
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Virtual memory/machine operations.
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Efficient mechanisms for exception processing, context switches, and interrupt handling.
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Fully concurrent instruction execution with the main processor.
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Use with any host processor, on an 8-, 16-, or 32-bit data bus.
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Concurrent execution of multiple floating-point instructions.
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Special-purpose hardware for high-speed conversion of binary real memory operands to/from the internal extended format.
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Simultaneous access to the floating-point registers by the MC68882's conversion and arithmetic processing units.
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Reduced coprocessor interface overhead to increase throughput.
MC68882 Documentation
Packages & Pinouts
http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=MC68882&nodeId=01M994189716807 (1 of 4) [4/24/02 10:41:05 AM]