MC68331
USER’S MANUAL
MOTOROLA
xi
Figure
Title
Page
3-1
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3-8
4-1
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4-10
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5-1
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6-1
6-2
MCU Block Diagram........................................................................................ 3-3
Pin Assignments for 132-Pin Package............................................................ 3-4
Pin Assignments for 144-Pin Package............................................................ 3-5
Internal Register Memory Map...................................................................... 3-11
Overall Memory Map..................................................................................... 3-12
Separate Supervisor and User Space Map................................................... 3-13
Supervisor Space (Separate Program/Data Space) Map ............................. 3-14
User Space (Separate Program/Data Space) Map....................................... 3-15
System Integration Module Block Diagram..................................................... 4-2
System Configuration and Protection.............................................................. 4-3
Periodic Interrupt Timer and Software Watchdog Timer ................................. 4-7
System Clock Block Diagram.......................................................................... 4-9
System Clock Oscillator Circuit ..................................................................... 4-10
System Clock Filter Networks ....................................................................... 4-11
MCU Basic System ....................................................................................... 4-17
Operand Byte Order...................................................................................... 4-21
Word Read Cycle Flowchart.......................................................................... 4-24
Write Cycle Flowchart ................................................................................... 4-25
CPU Space Address Encoding ..................................................................... 4-27
Breakpoint Operation Flowchart.................................................................... 4-29
LPSTOP Interrupt Mask Level....................................................................... 4-30
Bus Arbitration Flowchart for Single Request................................................ 4-35
Data Bus Mode Select Conditioning.............................................................. 4-39
Power-On Reset............................................................................................ 4-44
Basic MCU System ....................................................................................... 4-49
Chip-Select Circuit Block Diagram ................................................................ 4-50
CPU Space Encoding for Interrupt Acknowledge.......................................... 4-55
CPU32 Block Diagram .................................................................................... 5-2
User Programming Model ............................................................................... 5-3
Supervisor Programming Model Supplement.................................................. 5-3
Data Organization in Data Registers............................................................... 5-5
Address Organization in Address Registers.................................................... 5-5
Memory Operand Addressing ......................................................................... 5-8
Common In-Circuit Emulator Diagram .......................................................... 5-18
Bus State Analyzer Configuration ................................................................. 5-19
Debug Serial I/O Block Diagram ................................................................... 5-23
BDM Serial Data Word.................................................................................. 5-24
BDM Connector Pinout.................................................................................. 5-24
Loop Mode Instruction Sequence.................................................................. 5-25
QSM Block Diagram........................................................................................ 6-1
QSPI Block Diagram ....................................................................................... 6-6
LIST OF ILLUSTRATIONS