MC68331
USER’S MANUAL
CENTRAL PROCESSING UNIT
MOTOROLA
5-21
5
5.10.2.4 BDM Commands
Commands consist of one 16-bit operation word and can include one or more 16-bit
extension words. Each incoming word is read as it is assembled by the serial interface.
The microcode routine corresponding to a command is executed as soon as the com-
mand is complete. Result operands are loaded into the output shift register to be shift-
ed out as the next command is read. This process is repeated for each command until
the CPU returns to normal operating mode.
Table 5-5
is a summary of background
mode commands.
5.10.2.5 Background Mode Registers
BDM processing uses three special purpose registers to keep track of program context
during development. A description of each follows.
Table 5-5 Background Mode Command Summary
Command
Mnemonic
RDREG/RAREG
Description
Read D/A Register
Read the selected address or data register and
return the results via the serial interface.
WDREG/WAREG The data operand is written to the specified ad-
dress or data register.
RSREG
The specified system control register is read. All
registers that can be read in supervisor mode can
be read in background mode.
WSREG
The operand data is written into the specified sys-
tem control register.
READ
Read the sized data at the memory location spec-
ified by the long-word address. The source func-
tion code register (SFC) determines the address
space accessed.
WRITE
Write the operand data to the memory location
specified by the long-word address. The destina-
tion function code (DFC) register determines the
address space accessed.
DUMP
Used in conjunction with the READ command to
dump large blocks of memory. An initial READ is
executed to set up the starting address of the
block and retrieve the first result. Subsequent op-
erands are retrieved with the DUMP command.
FILL
Used in conjunction with the WRITE command to
fill large blocks of memory. An initial WRITE is ex-
ecuted to set up the starting address of the block
and supply the first operand. Subsequent oper-
ands are written with the FILL command.
GO
The pipe is flushed and re-filled before resuming
instruction execution at the current PC.
CALL
Current program counter is stacked at the loca-
tion of the current stack pointer. Instruction exe-
cution begins at user patch code.
RST
Asserts RESET for 512 clock cycles. The CPU is
not reset by this command. Synonymous with the
CPU RESET instruction.
NOP
NOP performs no operation and may be used as
a null command.
Write D/A Register
Read System Register
Write System Register
Read Memory Location
Write Memory Location
Dump Memory Block
Fill Memory Block
Resume Execution
Patch User Code
Reset Peripherals
No Operation