
MC68331
REGISTER SUMMARY
MOTOROLA
USER’S MANUAL
D-13
D
D.3 System Integration Module
Table D-3 displays the SIM address map. The column labeled “Access” indicates the
privilege level at which the CPU must be operating to access the register. A designa-
tion of “S” indicates that supervisor access is required. A designation of “S/U” indicates
that the register can be programmed to the desired privilege level.
Table D-3 SIM Address Map
Access
Address
15
8 7
0
S
$YFFA00
SIM CONFIGURATION (SIMCR)
S
$YFFA02
FACTORY TEST (SIMTR)
S
$YFFA04
CLOCK SYNTHESIZER CONTROL (SYNCR)
S
$YFFA06
NOT USED
RESET STATUS REGISTER (RSR)
S
$YFFA08
MODULE TEST E (SIMTRE)
S
$YFFA0A
NOT USED
S
$YFFA0C
NOT USED
S
$YFFA0E
NOT USED
S/U
$YFFA10
NOT USED
PORT E DATA (PORTE0)
S/U
$YFFA12
NOT USED
PORT E DATA (PORTE1)
S/U
$YFFA14
NOT USED
PORT E DATA DIRECTION (DDRE)
S
$YFFA16
NOT USED
PORT E PIN ASSIGNMENT (PEPAR)
S/U
$YFFA18
NOT USED
PORT F DATA (PORTF0)
S/U
$YFFA1A
NOT USED
PORT F DATA (PORTF1)
S/U
$YFFA1C
NOT USED
PORT F DATA DIRECTION (DDRF)
S
$YFFA1E
NOT USED
PORT F PIN ASSIGNMENT (PFPAR)
S
$YFFA20
NOT USED
SYSTEM PROTECTION CONTROL
(SYPCR)
S
$YFFA22
PERIODIC INTERRUPT CONTROL (PICR)
S
$YFFA24
PERIODIC INTERRUPT TIMING (PITR)
S
$YFFA26
NOT USED
SOFTWARE SERVICE (SWSR)
S
$YFFA28
NOT USED
S
$YFFA2A
NOT USED
S
$YFFA2C
NOT USED
S
$YFFA2E
NOT USED
S
$YFFA30
TEST MODULE MASTER SHIFT A (TSTMSRA)
S
$YFFA32
TEST MODULE MASTER SHIFT B (TSTMSRB)
S
$YFFA34
TEST MODULE SHIFT COUNT (TSTSC)
S
$YFFA36
TEST MODULE REPETITION COUNTER (TSTRC)
S
$YFFA38
TEST MODULE CONTROL (CREG)
S/U
$YFFA3A
TEST MODULE DISTRIBUTED REGISTER (DREG)
$YFFA3C
NOT USED
$YFFA3E
NOT USED
S/U
$YFFA40
NOT USED
PORT C DATA (PORTC)
$YFFA42
NOT USED
S
$YFFA44
CHIP-SELECT PIN ASSIGNMENT (CSPAR0)
S
$YFFA46
CHIP-SELECT PIN ASSIGNMENT (CSPAR1)
S
$YFFA48
CHIP-SELECT BASE BOOT (CSBARBT)
S
$YFFA4A
CHIP-SELECT OPTION BOOT (CSORBT)
S
$YFFA4C
CHIP-SELECT BASE 0 (CSBAR0)
S
$YFFA4E
CHIP-SELECT OPTION 0 (CSOR0)