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          • 您現(xiàn)在的位置:買賣IC網(wǎng) > PDF目錄45211 > MC68331CPV16B1 (MOTOROLA INC) 32-BIT, 16 MHz, MICROCONTROLLER, PQFP144 PDF資料下載
          參數(shù)資料
          型號: MC68331CPV16B1
          廠商: MOTOROLA INC
          元件分類: 微控制器/微處理器
          英文描述: 32-BIT, 16 MHz, MICROCONTROLLER, PQFP144
          封裝: 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-144
          文件頁數(shù): 32/90頁
          文件大小: 481K
          代理商: MC68331CPV16B1
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          MOTOROLA
          MC68331
          38
          MC68331TS/D
          3.7.3 Reset Timing
          The RESET input must be asserted for a specified minimum period in order for reset to occur. External
          RESET assertion can be delayed internally for a period equal to the longest bus cycle time (or the bus
          monitor time-out period) in order to protect write cycles from being aborted by reset. While RESET is
          asserted, SIM pins are either in a disabled high-impedance state or are driven to their inactive states.
          When an external device asserts RESET for the proper period, reset control logic clocks the signal into
          an internal latch. The control logic drives the RESET pin low for an additional 512 CLKOUT cycles after
          it detects that the RESET signal is no longer being externally driven, to guarantee this length of reset
          to the entire system.
          If an internal source asserts a reset signal, the reset control logic asserts RESET for a minimum of 512
          cycles. If the reset signal is still asserted at the end of 512 cycles, the control logic continues to assert
          RESET until the internal reset signal is negated.
          After 512 cycles have elapsed, the reset input pin goes to an inactive, high-impedance state for 10 cy-
          cles. At the end of this 10-cycle period, the reset input is tested. When the input is at logic level one,
          reset exception processing begins. If, however, the reset input is at logic level zero, the reset control
          logic drives the pin low for another 512 cycles. At the end of this period, the pin again goes to high-
          impedance state for 10 cycles, then it is tested again. The process repeats until RESET is released.
          3.7.4 Power-On Reset
          When the SIM clock synthesizer is used to generate the system clock, power-on reset involves special
          circumstances related to application of system and clock synthesizer power. Regardless of clock
          source, voltage must be applied to clock synthesizer power input pin VDDSYN in order for the MCU to
          operate. The following discussion assumes that VDDSYN is applied before and during reset. This mini-
          mizes crystal start-up time. When VDDSYN is applied at power-on, start-up time is affected by specific
          crystal parameters and by oscillator circuit design. VDD ramp-up time also affects pin state during reset.
          During power-on reset, an internal circuit in the SIM drives the internal (IMB) and external reset lines.
          The circuit releases the internal reset line as VDD ramps up to the minimum specified value, and SIM
          pins are initialized. When VDD reaches the specified minimum value, the clock synthesizer VCO begins
          operation. Clock frequency ramps up to the specified limp mode frequency. The external RESET line
          remains asserted until the clock synthesizer PLL locks and 512 CLKOUT cycles elapse.
          Table 19 Module Pin Functions
          Module
          Pin Mnemonic
          Function
          CPU32
          DSI/IFETCH
          DSO/IPIPE
          BKPT/DSCLK
          GPT
          PGP7/IC4/OC5
          Discrete Input
          PGP[6:3]/OC[4:1]
          Discrete Input
          PGP[2:0]/IC[3:1]
          Discrete Input
          PAI
          Discrete Input
          PCLK
          Discrete Input
          PWMA, PWMB
          Discrete Output
          QSM
          PQS7/TXD
          Discrete Input
          PQS[6:4]/PCS[3:1]
          Discrete Input
          PQS3/PCS0/SS
          Discrete Input
          PQS2/SCK
          Discrete Input
          PQS1/MOSI
          Discrete Input
          PQS0/MISO
          Discrete Input
          RXD
          相關(guān)PDF資料
          PDF描述
          MC68331CPV20 32-BIT, 20.97 MHz, MICROCONTROLLER, PQFP144
          MC68331CFC25 32-BIT, MICROCONTROLLER, PQFP132
          MC68331MFC16 32-BIT, 16.78 MHz, MICROCONTROLLER, PQFP132
          MC68331CFC16 32-BIT, 16.78 MHz, MICROCONTROLLER, PQFP132
          MC68332GCPV16 32-BIT, 16.78 MHz, MICROCONTROLLER, PQFP144
          相關(guān)代理商/技術(shù)參數(shù)
          參數(shù)描述
          MC68331CPV20 制造商:Rochester Electronics LLC 功能描述:32BIT MCU,GPT,SIM,QSM - Bulk
          MC68331CPV20B1 制造商:Rochester Electronics LLC 功能描述:32BIT MCU,GPT,SIM,QSM - Bulk
          MC68331CPV25 制造商:Rochester Electronics LLC 功能描述:32BIT MCU,GPT,SIM,QSM - Bulk
          MC68331LPV20 制造商:Motorola Inc 功能描述:
          MC68331MEH16 功能描述:32位微控制器 - MCU 32B MCU GPT SIM QSM RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT
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