參數(shù)資料
型號(hào): MC68030CRC33C
廠(chǎng)商: FREESCALE SEMICONDUCTOR INC
元件分類(lèi): 微控制器/微處理器
英文描述: 32-BIT, 33 MHz, MICROPROCESSOR, CPGA128
封裝: LEAD FREE, PGA-128
文件頁(yè)數(shù): 15/44頁(yè)
文件大小: 499K
代理商: MC68030CRC33C
2 2
MC68EC030 TECHNICAL DATA
MOTOROLA
0.8 V
2.0 V
B
A
DRIVE TO
0.5 V
2.0 V
0.8 V
VALID
OUTPUT n
VALID
OUTPUT
n + 1
2.0 V
0.8 V
2.0 V
0.8 V
2.0 V
0.8 V
VALID
OUTPUT n
VALID
OUTPUT n+1
2.0 V
0.8 V
B
A
VALID
INPUT
2.0 V
0.8 V
2.0 V
0.8 V
D
C
DRIVE TO
0.5 V
DRIVE TO
2.4 V
VALID
INPUT
2.0 V
0.8 V
2.0 V
0.8 V
D
C
DRIVE
TO 0.5 V
DRIVE
TO 2.4 V
2.0 V
0.8 V
2.0 V
0.8 V
F
E
CLK
OUTPUTS(1) CLK
OUTPUTS(2) CLK
INPUTS(3) CLK
INPUTS(4) CLK
ALL SIGNALS(5)
NOTES:
1. This output timing is applicable to all parameters specified relative to the rising edge of the clock.
2. This output timing is applicable to all parameters specified relative to the falling edge of the clock.
3. This input timing is applicable to all parameters specified relative to the rising edge of the clock.
4. This input timing is applicable to all parameters specified relative to the falling edge of the clock.
5. This timing is applicable to all parameters specified relative to the assertion/negation of another signal.
LEGEND:
A. Maximum output delay specification.
B. Minimum output hold time.
C. Minimum input setup time specification.
D. Minimum input hold time specification.
E. Signal valid to signal valid specification (maximum or minimum).
F. Signal valid to signal invalid specification (maximum or minimum).
DRIVE
TO 2.4 V
Figure 9.
Drive Levels and Test Points for AC Specifications
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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