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M68020 USER’S MANUAL
MOTOROLA
In contrast, standard peripheral hardware is generally accessed through interface
registers mapped into the memory space of the main processor. To use the services
provided by the peripheral, the programmer accesses the peripheral registers with
standard processor instructions. While a peripheral could conceivably provide capabilities
equivalent to a coprocessor for many applications, the programmer must implement the
communication protocol between the main processor and the peripheral necessary to use
the peripheral hardware.
The communication protocol defined for the M68000 coprocessor interface is described in
7.2 Coprocessor Instruction Types. The algorithms that implement the M68000
coprocessor interface are provided in the microcode of the MC68020/EC020 and are
completely transparent to the MC68020/EC020 programming model. For example,
floating-point operations are not implemented in the MC68020/EC020 hardware. In a
system utilizing both the MC68020/EC020 and the MC68881 or MC68882 floating-point
coprocessor, a programmer can use any of the instructions defined for the coprocessor
without knowing that the actual computation is performed by the MC68881 or MC68882
hardware.
7.1.1 Interface Features
The M68000 coprocessor interface design incorporates a number of flexible capabilities.
The physical coprocessor interface uses the main processor external bus, which simplifies
the interface since no special-purpose signals are involved. With the MC68020/EC020, a
coprocessor uses the asynchronous bus transfer protocol. Since standard bus cycles
transfer information between the main processor and the coprocessor, the coprocessor
can be implemented in whatever technology is available to the coprocessor designer. A
coprocessor can be implemented as a VLSI device, as a separate system board, or even
as a separate computer system.
Since the main processor and a M68000 coprocessor can communicate using the
asynchronous bus, they can operate at different clock frequencies. The system designer
can choose the speeds of a main processor and coprocessor that provide the optimum
performance for a given system. Both the MC68881 and MC68882 floating-point
coprocessors use the asynchronous bus handshake protocol.
The M68000 coprocessor interface also facilitates the design of coprocessors. The
coprocessor designer must only conform to the coprocessor interface and does not need
an extensive knowledge of the architecture of the main processor. Also, the main
processor can operate with a coprocessor without having explicit provisions made in the
main processor for the capabilities of that coprocessor. This type of interface provides a
great deal of freedom in the implementation of a given coprocessor.
7.1.2 Concurrent Operation Support
The programming model for the M68000 family of microprocessors is based on
sequential, nonconcurrent instruction execution, which implies that the instructions in a
given sequence must appear to be executed in the order in which they occur. To maintain
a uniform programming model, any coprocessor extensions should also maintain the
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Freescale Semiconductor, Inc.
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Go to: www.freescale.com
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