參數(shù)資料
型號： MC56F8345
廠商： Motorola, Inc.
英文描述： 56F8345 16-bit Hybrid Controller
中文描述： 56F8345 16位混合控制器
文件頁數(shù)： 28/148頁
文件大?。?/td> 1420K
代理商： MC56F8345
28
56F8345 Technical Data
Preliminary
RESET
78
Schmitt
Input
Input
Reset
— This input is a direct hardware reset on the
processor. When RESET is asserted low, the device is
initialized and placed in the reset state. A Schmitt trigger
input is used for noise immunity. The internal reset signal
will be deasserted synchronous with the internal clocks
after a fixed number of internal clocks.
To ensure complete hardware reset, RESET and TRST
should be asserted together. The only exception occurs in
a debugging environment when a hardware device reset
is required and the JTAG/EOnCE module must not be
reset. In this case, assert RESET, but do not assert
TRST.
Note:
The internal Power-On Reset will assert on initial
power-up.
To deactivate the internal pull-up resistor, set the RESET
bit in the SIM_PUDR register. See
Section 6.5.6 SIM
Pull-up Disable Register (SIM_PUDR)
. for details.
RSTO
77
Output
Output
Reset Output
— This output reflects the internal reset
state of the chip.
EXTBOOT
Internal
Ground
Schmitt
Input
Input
External Boot
— This input is tied to V
DD
to force the
device to boot from off-chip memory (assuming that the
on-chip Flash memory is not in a secure state).
Otherwise, it is tied to ground. For details, see
Table 4-4
.
Note:
When this pin is tied low, the customer boot
software should disable the internal pull-up resistor by
setting the XBOOT bit of the SIM_PUDR; see
Section
6.5.6 SIM Pull-up Disable Register (SIM_PUDR)
.
Note
: This pin is internally tied low (to V
SS
).
EMI_MODE
Internal
Ground
Schmitt
Input
Input
External Memory Mode
— This device will boot from
internal Flash memory under normal operation.
This function is also affected by EXTBOOT and the Flash
security mode; see
Table 4-4
for details.
Note:
When this pin is tied low, the customer boot
software should disable the internal pull-up resistor by
setting the EMI_MODE bit of the SIM_PUDR; see
Section 6.5.6 SIM Pull-up Disable Register
(SIM_PUDR)
.
Note:
This pin is internally tied low (to V
SS
).
Table 2-2 56F8345 Signal and Package Information for the 128-Pin LQFP
Signal
Name
Pin No.
Type
State
During
Reset
Signal Description
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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參數(shù)描述
MC56F8345MFG60 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8345MFGE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz/60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8345VFG60 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8345VFGE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8346 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
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