參數(shù)資料
型號(hào): MC56F8323VFB60
廠商: Freescale Semiconductor
文件頁數(shù): 86/140頁
文件大?。?/td> 0K
描述: IC MPU HYBRID DSP 32K 64-LQFP
標(biāo)準(zhǔn)包裝: 160
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 60MHz
連通性: CAN,SCI,SPI
外圍設(shè)備: POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 27
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 12K x 8
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 64-LQFP
包裝: 托盤
配用: MC56F8323EVME-ND - BOARD EVALUATION MC56F8323
56F8323 Technical Data, Rev. 17
Freescale Semiconductor
5
Preliminary
56F8323/56F8123 Block Diagram
Program Controller
and Hardware
Looping Unit
Data ALU
16 x 16 + 36
> 36-Bit MAC
Three 16-bit Input Registers
Four 36-bit Accumulators
Address
Generation Unit
Bit
Manipulation
Unit
16-Bit
56800E Core
Interrupt
Controller
COP/
Watchdog
4
IRQA
PDB
XAB1
XAB2
XDB2
CDBR
SPI0 or
SCI1 or
GPIOB
IPBus Bridge (IPBB)
Decoding
Peripherals
Peripheral
Device Selects
RW
Control
IPAB
IPWDB
IPRDB
System Bus
Control
R/W Control
PAB
CDBW
CDBR
CDBW
JTAG/
EOnCE
Port
Digital Reg
Analog Reg
Low Voltage
Supervisor
VDD
VSS
VDDA
VSSA
5
44
2
RESET
3
6
Quad
Timer C or
SCI0 or
GPIOC
5
Quadrature
Decoder 0 or
Quad
Timer A or
GPIO B
FlexCAN or
GPIOC
2
4
VREF
PLL
Clock
Generator*
Integration
Module
System
P
O
R
O
S
C
Clock
resets
PWM Outputs
Current Sense Inputs
PWMA or
SPI1 or
GPIOA
TEMP_SENSE
*Includes On-Chip
Relaxation Oscillator
3
Fault Inputs
OCR_DIS
VCAP
4
3
AD0
4
AD1
4
XTAL or GPIOC
EXTAL or GPIOC
Data Memory
4K x 16 Flash
4K x 16 RAM
Memory
Program Memory
16K x 16 Flash
2K x 16 RAM
4K x 16 Boot
Flash
56F8323/56F8123 General Description
Note: Features in italics are NOT available in the 56F8123 device.
Up to 60 MIPS at 60MHz core frequency
DSP and MCU functionality in a unified,
C-efficient architecture
32KB Program Flash
4KB Program RAM
8KB Data Flash
8KB Data RAM
8KB Boot Flash
One 6-channel PWM module
Two 4-channel 12-bit ADCs
Temperature Sensor
One Quadrature Decoder
One FlexCAN module
Up to two Serial Communication Interfaces (SCIs)
Up to two Serial Peripheral Interfaces (SPIs)
Two general-purpose Quad Timers
Computer Operating Properly (COP)/Watchdog
On-Chip Relaxation Oscillator
JTAG/Enhanced On-Chip Emulation (OnCE) for
unobtrusive, real-time debugging
Up to 27 GPIO lines
64-pin LQFP Package
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