參數(shù)資料
型號: MC56F8322MFAE
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號處理
英文描述: 0-BIT, 120 MHz, OTHER DSP, PQFP48
封裝: ROHS COMPLIANT, LQFP-48
文件頁數(shù): 14/136頁
文件大小: 719K
代理商: MC56F8322MFAE
56F8322 Techncial Data, Rev. 16
110
Freescale Semiconductor
Preliminary
Figure 10-2 shows the definitions of the following signal states:
Active state, when a bus or signal is driven, and enters a low impedance state
Tri-stated, when a bus or signal is placed in a high impedance state
Data Valid state, when a signal level has reached VOL or VOH
Data Invalid state, when a signal level is in transition between VOL and VOH
Figure 10-2 Signal States
10.4 Flash Memory Characteristics
Table 10-12 Flash Timing Parameters
Characteristic
Symbol
Min
Typ
Max
Unit
Program time1
1. There is additional overhead which is part of the programming sequence. See the 56F8300 Peripheral User Manual for details.
Program time is per 16-bit word in Flash memory. Two words at a time can be programmed within the Program Flash module,
as it contains two interleaved memories.
Tprog
20
μs
Erase time2
2. Specifies page erase time. There are 512 bytes per page in the Data and Boot Flash memories. The Program Flash module
uses two interleaved Flash memories, increasing the effective page size to 1024 bytes.
Terase
20
ms
Mass erase time
Tme
100
ms
Data Invalid State
Data1
Data2 Valid
Data
Tri-stated
Data3 Valid
Data2
Data3
Data1 Valid
Data Active
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