參數(shù)資料
型號： MC56F8122VFAE
廠商： Freescale Semiconductor
文件頁數(shù)： 55/136頁
文件大小： 0K
描述： IC DSP 16BIT 40MHZ 48-LQFP
標(biāo)準(zhǔn)包裝： 250
系列： 56F8xxx
核心處理器： 56800E
芯體尺寸： 16-位
速度： 40MHz
連通性： SCI，SPI
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 21
程序存儲器容量： 32KB（16K x 16）
程序存儲器類型： 閃存
RAM 容量： 4K x 16
電壓 - 電源 (Vcc/Vdd)： 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 6x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 48-LQFP
包裝： 托盤
產(chǎn)品目錄頁面： 734 (CN2011-ZH PDF)
Signal Pins
56F8322 Technical Data, Rev. 16
Freescale Semiconductor
25
Preliminary
PWMA4
(MOSI1)
(GPIOA4)
8
Output
Schmitt
Input/
Output
Schmitt
Input/
Output
In reset,
output is
disabled,
pull-up is
enabled
PWMA4 — This is one of six PWMA output pins.
SPI 1 Master Out/Slave In — This serial data pin is an output from a
master device and an input to a slave device. The master device
places data on the MOSI line a half-cycle before the clock edge the
slave device uses to latch the data.
Port A GPIO — This GPIO pin can be individually programmed as an
input or output pin.
In the 56F8322, the default state after reset is PWMA4.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
PWMA5
(SCLK1)
(GPIOA5)
9
Output
Schmitt
Input/
Output
Schmitt
Input/
Output
In reset,
output is
disabled,
pull-up is
enabled
PWMA5 — This is one of six PWMA output pins.
SPI 1 Serial Clock — In the master mode, this pin serves as an
output, clocking slaved listeners. In slave mode, this pin serves as the
data clock input. A Schmitt trigger input is used for noise immunity.
Port A GPIO — This GPIO pin can be individually programmed as an
input or output pin.
In the 56F8322, the default state after reset is PWMA5.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
FAULTA0
(GPIOA6)
12
Schmitt
Input
Schmitt
Input/
Output
Input
FAULTA0 — This fault input pin is used for disabling selected PWMA
outputs in cases where fault conditions originate off-chip.
Port A GPIO — This GPIO pin can be individually programmed as an
input or output pin.
In the 56F8322, the default state after reset is FAULTA0.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
ANA0
20
Input
Analog Input ANA0 - 2 — Analog inputs to ADCA, Channel 0
ANA1
21
ANA2
22
ANA4
23
Input
Analog Input ANA4 - 6 — Analog inputs to ADCA, Channel 1
ANA5
24
ANA6
25
Table 2-2 Signal and Package Information for the 48-Pin LQFP (Continued)
Signal Name
Pin No.
Type
State During
Reset
Signal Description
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