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參數(shù)資料
| 型號： | MC56F8037VLH |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | ROHS COMPLIANT, LQFP-64 |
| 文件頁數(shù)： | 31/180頁 |
| 文件大?。?/td> | 985K |
| 代理商： | MC56F8037VLH |
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56F8037 Data Sheet, Rev. 4
126
Freescale Semiconductor
Preliminary
power-down of the device. Only two bytes within this field are used to enable or disable security. Refer to
the Flash Memory chapter in the 56F802x and 56F803x Peripheral Reference Manual for the state of
the security bytes and the resulting state of security. When Flash security mode is enabled in accordance
with the method described in the Flash Memory module chapter, the 56F8037 will disable the core EOnCE
debug capabilities. Normal program execution is otherwise unaffected.
7.2 Flash Access Lock and Unlock Mechanisms
The 56F8037 has several operating functional and debug modes. Effective Flash security must address
operating mode selection and anticipate modes in which the on-chip Flash can be read without explicit user
permission.
7.2.1
Disabling EOnCE Access
On-chip Flash can be read by issuing commands across the EOnCE port, which is the debug interface for
the 56800E CPU. The TCK, TMS, TDO, and TDI pins comprise a JTAG interface onto which the EOnCE
port functionality is mapped. When the 56F8037 boots, the chip-level JTAG TAP (Test Access Port) is
active and provides the chip’s boundary scan capability and access to the ID register, but proper
implementation of Flash security will block any attempt to access the internal Flash memory via the
EOnCE port when security is enabled.
7.2.2
Flash Lockout Recovery Using JTAG
If a user inadvertently enables security on the 56F8037, the only lockout recovery mechanism is the
complete erasure of the internal Flash contents, including the configuration field, and thus disables security
(the protection register is cleared). This does not compromise security, as the entire contents of the user’s
secured code stored in Flash are erased before security is disabled on the 56F8037 on the next reset or
power-up sequence.
To start the lockout recovery sequence, the JTAG public instruction (LOCKOUT_RECOVERY) must
first
be
shifted
into
the
chip-level
TAP
controller’s
instruction
register.
Once
the
LOCKOUT_RECOVERY instruction has been shifted into the instruction register, the clock divider value
must be shifted into the corresponding 7-bit data register. After the data register has been updated, the user
must transition the TAP controller into the RUN-TEST/IDLE state for the lockout sequence to commence.
The controller must remain in this state until the erase sequence has completed. Refer to the 56F802x and
56F803x Peripheral Reference Manual for more details, or contact Freescale.
Note:
Once the lockout recovery sequence has completed, the user must reset both the JTAG TAP controller
(by advancing the TAP state machine to the reset state) and the 56F8037 (by asserting external chip
reset) to return to normal unsecured operation.
7.2.3
Flash Lockout Recovery using CodeWarrior
CodeWarrior can unlock a device using the command sequence described in Section 7.2.2 by selecting the
Debug menu, then selecting DSP56800E, followed by Unlock Flash.
Another mechanism is also built into CodeWarrior using the device’s memory configuration file. The
command “Unlock_Flash_on_Connect1” in the .cfg file accomplishes the same task as using the Debug
menu.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC56F8037VLHR | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT DSPHC RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| MC56F80XXRM | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Digital Signal Controller Product Brief |
| MC56F8122 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| MC56F8122VFA | 制造商:Freescale Semiconductor 功能描述:16 BIT HYBRID CONTROLLER - Trays |
| MC56F8122VFAE | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
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