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參數(shù)資料
| 型號(hào)： | MC54HC354J |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-Input Data Selector/Multiplexer With Data and Address Latches and 3-State Outputs |
| 中文描述： | HC/UH SERIES, 8 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, CDIP20 |
| 封裝： | CERAMIC, DIP-20 |
| 文件頁數(shù)： | 2/9頁 |
| 文件大?。?/td> | 206K |
| 代理商： | MC54HC354J |
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
2
Plastic DIP or SOIC Package
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
Ceramic DIP: – 10 mW/ C from 100 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
260
(Figure 1)
0
500
DC CHARACTERISTICS
(Voltages Referenced to GND)
Symbol
Parameter
Condition
V
Guaranteed Limit
Unit
VCC
–55 to 25
°
C
≤
85
°
C
≤
125
°
C
VIH
Minimum High–Level Input Voltage
Vout = 0.1V or VCC –0.1V
|Iout|
≤
20
μ
A
2.0
4.5
6.0
1.50
3.15
4.20
1.50
3.15
4.20
1.50
3.15
4.20
V
VIL
Maximum Low–Level Input Voltage
Vout = 0.1V or VCC – 0.1V
|Iout|
≤
20
μ
A
2.0
4.5
6.0
0.3
0.9
1.2
0.3
0.9
1.2
0.3
0.9
1.2
V
VOH
Minimum High–Level Output
Voltage
Vin = VIH or VIL
|Iout|
≤
20
μ
A
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
Vin =VIH or VIL
|Iout|
≤
6.0mA
|Iout|
≤
7.8mA
4.5
6.0
3.98
5.48
3.84
5.34
3.70
5.20
VOL
Maximum Low–Level Output
Voltage
Vin = VIH or VIL
|Iout|
≤
20
μ
A
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
Vin = VIH or VIL
|Iout|
≤
6.0mA
|Iout|
≤
7.8mA
4.5
6.0
0.26
0.26
0.33
0.33
0.40
0.40
Iin
Maximum Input Leakage Current
Vin = VCC or GND
6.0
±
0.1
±
1.0
±
1.0
μ
A
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
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