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參數(shù)資料
| 型號： | MC54HC164 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8-Bit Serial-Input/Parallel-Output Shift Register |
| 中文描述： | 8位Serial-Input/Parallel-Output移位寄存器 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 204K |
| 代理商： | MC54HC164 |
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
3–2
(Plastic DIP or SOIC Package)
260
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
Ceramic DIP: – 10 mW/ C from 100 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
(Figure 1)
0
500
VCC = 4.5 V
Symbol
Parameter
Test Conditions
V
25 C
125 C
VIH
Minimum High–Level Input
Vout = 0.1 V or VCC – 0.1 V
2.0
6.0
1.5
4.2
85 C
1.5
4.2
1.5
4.2
Unit
VIL
Maximum Low–Level Input
Vout = 0.1 V or VCC – 0.1 V
2.0
6.0
0.3
1.2
0.3
1.2
0.3
1.2
V
VOH
Minimum High–Level Output
Vin = VIH or VIL
2.0
6.0
4.0 mA
1.9
5.9
1.9
5.9
1.9
5.9
V
Vin = VIH or VIL
4.5
3.98
3.84
3.70
V
Voltage
|Iout|
20
μ
A
|Iout|
4.5
5.2 mA
0.1
0.1
0.1
6.0
0.26
0.33
0.40
Iin
ICC
Maximum Input Leakage Current
Vin = VCC or GND
Vin = VCC or GND
|Iout|
6.0
±
0.1
8
±
1.0
±
1.0
160
μ
A
A
Maximum Quiescent Supply
6.0
80
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
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