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參數(shù)資料
| 型號： | MC54-74HC273A |
| 廠商： | Motorola, Inc. |
| 英文描述： | Octal D Flip-Flop with Common Clock and Reset |
| 中文描述： | 八路D觸發(fā)器與普通時鐘和復(fù)位拖鞋 |
| 文件頁數(shù)： | 3/7頁 |
| 文件大?。?/td> | 184K |
| 代理商： | MC54-74HC273A |
MC54/74HC273A
High–Speed CMOS Logic Data
DL129 — Rev 6
3–3
MOTOROLA
(Voltages Referenced to GND)
0.1
0.1
25 C
6.0
|Iout|
20
μ
A
Voltage
Unit
V
0.1
125 C
0.1
85 C
0.1
V
Test Conditions
Vin = VIL
Parameter
Symbol
Maximum Low–Level Output
Vin = VIL or VIH
Vin = VCC or GND
Iout = 0
μ
A
2.4 mA
2.0
0.1
|Iout|
3.0
4.5
0.26
0.26
±
5.0
0.33
0.33
0.4
0.4
Current (per Package)
Current
Maximum Quiescent Supply
Symbol
b l
Parameter
V
25 C
U i
6.0
6.0
6.0
35
90
25
25
125 C
24
38
38
(Figures 1 and 4)
3.0
15
10
28
8.0
tPHL
(Figures 1 and 4)
3.0
13
75
120
31
220
140
ns
Maximum Propagation Delay, Reset to Q
2.0
145
180
31
220
ns
Maximum Output Transition Time, Any Output
2.0
6.0
95
16
110
19
ns
Cin
Maximum Input Capacitance
10
10
10
pF
CPD
Power Dissipation Capacitance (Per Enabled Output)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
bl d O
Typical @ 25
°
C, VCC = 5.0 V
48
pF
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