參數(shù)資料
型號: MC44BS373CAFCEVK
廠商: Freescale Semiconductor
文件頁數(shù): 21/52頁
文件大?。?/td> 0K
描述: KIT EVAL FOR BS373CAFC 16PIN
標準包裝: 1
主要目的: 音頻視頻集成調制器
已用 IC / 零件: MC44BS373CA
MC44BS373CA Data Sheet
High Speed I2C Compatible Bus
16.2 Timing Definitions
Figure 11. SSDA/SSCL Timing
Table 27. Electrical Characteristics
Electrical Characteristics
Symbol Minimum Typical Maximum
Unit
Type
SDA/SCL output current at 0V
–5
–2
AA
SDA/SCL low input level
VIL
——
1.5
V
B
SDA/SCL high input level
VIH
2.1
V
B
SDA/SCL input current for input level from 0.4 V to 0.3 VCC
–5
5
AC
SDA/SCL input level
0
VCC+0.3
V
D
SDA/SCL capacitance
10
pF
C
ACK low output level (3 mA sinking current)
0.3
V
C
ACK low output level (9 mA sinking current)
0.8
V
C
Table 28. Timing Characteristics
Timing Characteristics
Symbol
Minimum
Typical
Maximum
Unit
Type
Bus clock frequency
0
800
kHz
C
Bus free time between stop and start
Tbuf
200
ns
C
Setup time for start condition
Tsu;sta
500
ns
C
Hold time for start condition
Thd;sta
500
ns
C
Data setup time
Tsu;dat
0—
ns
C
Data hold time
Thd;dat
0—
ns
C
Setup time for stop condition
Tsu;sto
500
ns
C
Hold time for stop condition
Thd;sto
500
ns
C
Acknowledge propagation delay
Tack;low
——
300
ns
C
SDA fall time at 3 ma sink I and 130-pF load
50
ns
C
SDA fall time at 3 ma sink I and 400-pF load
80
ns
C
SDA rise time
SCL fall/rise time
300
ns
C
Pulse width of spikes suppressed by the input filter
50
ns
C
Tbuf
SSDA
...
ACK
Thd;dat
Tsu;dat
Tsu;sto
Thd;sta
Tack;low
Start
Stop
SSCL
SCL
SDA
Tsu;sta
Chip Address
SCL
SDA
Thd;sto
Start
Stop
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