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參數(shù)資料
| 型號(hào)： | MC44251FU |
| 廠商： | MOTOROLA INC |
| 元件分類： | ADC |
| 英文描述： | Triple 8-Bit Video ADC Three-State Outputs |
| 中文描述： | TRIPLE 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁(yè)數(shù)： | 2/18頁(yè) |
| 文件大?。?/td> | 273K |
| 代理商： | MC44251FU |
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MC44251
2
MOTOROLA
PIN ASSIGNMENTS
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
1
1
2
2
2
2
2
2
2
2
2
6
5
4
3
2
1
4
4
4
4
4
B7
G0
G1
G2
G3
CS
G4
G5
G6
G7
R0
V
B
B
B
V
B
B
B
B
M
V
V
R
R
C
R
V
R
R
R
Ibias
VSS(R)
Bin
RBOT
Gin
RMID
Rin
RTOP
VDD(R)
VTN
HZ
D
S
D
R
D
S
VS
QFP
1
2
3
4
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
1
1
1
1
1
1
1
1
2
2
2
4
4
4
4
4
3
3
3
3
3
3
B7
G0
G1
G2
G3
CS
G4
G5
G6
G7
R0
V
B
B
B
V
B
B
B
B
M
V
V
R
R
C
R
V
R
R
R
Ibias
VSS(R)
Bin
RBOT
Gin
RMID
Rin
RTOP
VDD(R)
VTN
HZ
D
S
D
R
D
S
VS
PLCC
ABSOLUTE MAXIMUM RATINGS
Symbol
Characteristic
Value
Unit
VDD(A), VDD(D),
VDD(R)
DC Supply Voltage (referenced to
VSS)
– 0.5 to + 6.0
V
Vin
Iin
Iout
Tstg
Input Voltage, All Pins
– 0.5 to VDD + 0.5
±
20
V
DC Input Current per Pin
mA
DC Output Current per Pin
±
25
mA
Storage Temperature Range
– 65 to + 150
°
C
NOTE: Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating
Conditions.
ELECTRICAL CHARACTERISTICS
(Voltages Referenced to VSS) (VDD(R) = VDD(A) = VDD(D); Rbias (Pin 33) = 5 k
to ground)
OPERATING RANGES
Symbol
Characteristic
Min
Max
Unit
VDD(A), VDD(D),
VDD(R)
Power Supply Voltage
4.5
5.5
V
IDD(A)
IDD(R)
IDD(D)
TA
Analog Supply Current
—
55
mA
Reference Supply Current
—
28
5
mA
Digital Supply Current
—
mA
Operating Ambient Temperature Range
– 40
+ 85
°
C
A/D CONVERTER
Symbol
Characteristic
Min
Max
Unit
Cin
Vmin
Vmax
Vrange
Gain
Input Capacitance
—
60
pF
See Figure 11
0.3 x VDD
0.89 x VDD
0.57 x VDD
0.95
0.36 x VDD
0.93 x VDD
0.59 x VDD
1.0
V
See Figure 11
V
See Figure 11
V
See Figure 11 (Note 1)
LSB
DNL
Differential Nonlinearity (Note 1)
—
±
1.0
LSB
INL
Integral Nonlinearity (Note 1)
—
±
2.0
LSB
Egain
Eoff
Gain Difference (Note 2)
—
±
1.0
%
Offset Difference (Notes 1, 2)
—
±
3.0
LSB
This device contains protection circuitry to
guard against damage due to high static volt-
ages or electric fields. However, precautions
must be taken to avoid applications of any
voltage higher than maximum rated voltages to
this high–impedance circuit. For proper opera-
tion, Vin and Vout should be constrained to the
range VSS
≤
(Vin or Vout)
≤
VDD.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either VSS
or VDD). Unused outputs must be left open.
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