參數(shù)資料
型號: MC34016DW
廠商: MOTOROLA INC
元件分類: 模擬傳輸電路
英文描述: Battery-Backup Supervisors for RAM Retention 14-TSSOP -40 to 85
中文描述: TELECOM-SLIC, PDSO20
封裝: PLASTIC, SO-20
文件頁數(shù): 8/16頁
文件大小: 299K
代理商: MC34016DW
MC34016
8
MOTOROLA ANALOG IC DEVICE DATA
and R17. With R14 = 3.0 k
and ZHYS
= 18 k
the receive
gain equals 0 dB for the passive impedance application.
Outputs
The outputs Rx1 and Rx2 of the receive channel have an
output impedance of 150
and are designed to drive a 10 k
resistive load or a 47 nF capacitive load with a 3.5 Vpp swing.
AUTOMATIC GAIN CONTROL
The automatic gain control function (AGC) controls the
transmit and receive gains and the switchover for the
sidetone networks for short and long lines according to the
line current (which represents line length). The effect of AGC
on the transmit and receive amplifiers is 6.0 dB at default and
it can be disabled via the serial bus. The switchover for the
sidetone networks tracks the AGC curves for the transmit
and receive amplifier gain. This feature can also be disabled
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Bit 6, Reg. 2
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Bit 0, Reg. 2
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Sidetone Switchover Enabled
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No AGC Gain Range, Sidetone
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0
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AGC Range of 6.0 dB, only
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1
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0
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HYS Input Active, HYL Muted
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The ratio between start and stop current for the AGC
curves is programmable for both voltage and current
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Bit 4,
‘DC
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Bit 1,
‘AGC
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AGC Ratio
Ratio 1:3
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1
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Voltage Regu-
Ratio 1:2
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21
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42
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0
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0
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Current Regu-
lation, AGC
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1
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lation, AGC
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The relation between line current and Istart and Istop is
given by:
RAGC
RS
RAGC
RS
Figures 5, 6, 7 and 8 show the AGC curves for both
voltage regulation and current regulation. In current
regulation, the start point for the AGC curves is coupled to the
knee point of the dc characteristic, or: Iknee = IAGCstart.
Ilinestart
x IAGCstart
Ilinestop
x IAGCstop
LOGIC OUTPUT DRIVERS
The MC34016 is equipped with three logic outputs meant
to interface to the front end of a telephone. The outputs can
be controlled via the serial bus interface. As shown in the
characteristics, the logic outputs are capable of sourcing at
least 1.0 mA and sinking at least 5.0 mA.
Output HKSW
Output HKSW is dedicated to drive the hookswitch. With
HKSW low, the line is opened via Q2 and Q3 and
automatically switches off the line driver transistor Q1. This
feature guarantees fast dc settling after line breaks occurring
during pulse dialing.
Outputs Out1 and Out2
Outputs Out1 and Out2 may be used for any logic function,
such as control of an earth switch and/or a shunt wire.
SERIAL BUS INTERFACE
The serial interface of the MC34016 enables a simple
three wire connection to a micro controller.
Timing
Times t1, t2, t3, t4 and t5 are specified in the electrical
characteristics.
With BEN high, data can be clocked into the serial port by
using Data and Clk lines. On the rising edge of the Clk, the
data enters the MC34016. The last 8–bits of data entered are
shifted into the registers when BEN is forced low. With BEN
low, the serial port of the MC34016 is disabled. BEN must be
kept low until the next register update is needed. Data should
be written by entering the most significant bit first (Bit 7) and
the least significant bit (Bit 0) last.
With BEN low, the Data and Clk lines may be used to
control other devices in the application.
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