參數(shù)資料
型號: MC33701
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 1.5 A Switch-Mode Power Supply with Linear Regulator(1.5 A開關(guān)方式電源,帶線性穩(wěn)壓器)
中文描述: 1.5開關(guān)模式電源,線性穩(wěn)壓器(1.5 A的開關(guān)方式電源,帶線性穩(wěn)壓器)
文件頁數(shù): 19/24頁
文件大?。?/td> 841K
代理商: MC33701
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33701
19
I
2
C BUS OPERATION
Introduction
The 33701 device is compatible with the I
2
C interface
standard. SDA and SCL pins are the Serial Data and Serial
Clock pins of the I
2
C bus.
I
2
C Command and Data Formats
Communication Start
Communication starts with a START condition, followed by
the slave device unique address.
Figure 13
illustrates the data
transfer beginning an I
2
C communication for a 7-bit slave
address.
Figure 13. Communication Using 7-Bit Address
Slave Address Definition
33701 has the two LSB’s address bits defined by the state of
the CLKSEL pin and the ADDR pin.
Note
The state of the CLKSEL pin also defines the
configuration of the oscillator synchronization CLKSYN pin.
This feature allows up to four 33701 ICs to communicate in
the same I
2
C bus, all of them sharing the same high-order
address bits. A different combination of bits A1 and A0 is
assigned to each individual part to assure its unique address.
Figure 14
illustrates the flexible addressing feature for a 7-bit
address.
Table 3
provides the definition of the selectable
portion of the device address.
Figure 14. Address Bit Definition for 7-Bit Address
Writing Data Into the Slave Device
After the address acknowledgment by the slave, DATA can
be written into the slave registers. The R/W bit must be set to 0
so DATA will be read.
Figure 15
shows the data write
sequence. Actions performed by the slave device are grayed.
Figure 15. Data Transfer for Write Operations
Data Definition
For the sake of 33701 acting as a slave device, the master
writes a Command Byte and writes one Data Byte. The
Command Byte identifies the kind of operation required by the
master and has two fields, as illustrated in
Figure 16
:
1. Address field
2. Value field
The address field is selected from the list in
Table 4
.
Figure 16. Command Byte
Table 4. Address Field Definitions
Refer to
Table 5
, page 20, which summarizes the value field
definitions for the entire set of operation options.
S
7-Bit Address
R/W
Ack
1
0
2
3
4
5
6
1
1
1
0
1
A1 A0
Bits
Fixed Address
Selectable
Address
Table 3. Definition of Selectable Portion of Device Address
CLKSEL Pin
ADDR Pin
A1
A0
Low
Low
0
0
Low
Open
0
1
Open
Low
1
0
Open
Open
1
1
Code
Operation
Write
001
Voltage Margining
W
010
Not Used
011
Watchdog
W
S
7-Bit Address
0
Ack
DATA
Ack
D6
D5
D4 D3
D1 D0
Bits
Address Field
Value Field
7
D7
D2
3
2
1
0
4
5
6
F
Freescale Semiconductor, Inc.
Go to: www.freescale.com
n
.
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