參數(shù)資料
型號： MC33368DR2G
廠商： ON Semiconductor
文件頁數(shù)： 10/16頁
文件大小： 228K
描述： IC PFC CONTROLLER CRM 16SOIC
標準包裝： 2,500
系列： GreenLine™
模式： 臨界傳導（CRM）
電流 - 啟動： 16mA
電源電壓： 10 V ~ 16 V
工作溫度： -25°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.154"，3.90mm 寬）
供應商設備封裝： 16-SOIC
包裝： 帶卷 (TR)
其它名稱： MC33368DR2GOS
MC33368DR2GOS-ND
MC33368DR2GOSTR
MC33368
http://onsemi.com
10
Table 1. Design Equations
Calculation
Formula
Notes
Converter Output Power
P
O
+ V
O
I
O
Calculate the maximum required output power.
Peak Indicator Current
I
L(pk)
+
2  2
P
O
h Vac
(LL)
Calculated at the minimum required ac line voltage for
output regulation. Let the efficiency ?= 0.92 for low line
operation.
Inductance
L
P
+
t
V
O
2
Vac
(LL)
h Vac
(LL)
2
2
V
O
P
O
Let the switching cycle t = 40 ms for universal input (85
to 265 Vac) operation and 20 ms for fixed input (92 to
138 Vac, or 184 to 276 Vac) operation.
Switch OnTime
t
(on)
+
2 P
O
L
P
h Vac
2
In theory, the ontime t
(on)
 is constant. In practice, t
(on)
tends to increase at the ac line zero crossings due to
the charge on capacitor C5. Let Vac = Vac
(LL)
 for initial
t
(on)
 and t
(off)
 calculations.
Switch OffTime
t
(off)
+
t
(on)
V
O
2
Vac
Sin q
1
The offtime t
(off)
 is greatest at the peak of the ac line
voltage and approaches zero at the ac line zero
crossings. Theta (q) represents the angle of the ac line
voltage.
Minimum Switch
OffTime
t
(off)
min
+
L
P
I
L(pk)
V
O
The offtime is at a minimum at ac line crossings. This
equation is used to calculate t
(off)
 as Theta approaches
zero.
Delay Time
t
d
+  R10 C7 ln
V
CC
 2
V
CC
The delay time is used to override the minimum
offtime at the ac line zero crossings by programming
the Frequency Clamp with C7 and R10.
Switching Frequency
f +
1
t
(on)
) t
(off)
The minimum switching frequency occurs at the peak of
the ac line voltage. As the ac line voltage traverses
from peak to zero, t
(off)
 approaches zero producing an
increase in switching frequency.
Peak Switch Current
R7 +
V
CS
I
L(pk)
Set the current sense threshold V
CS
 to 1.0 V for
universal input (85 to 265 Vac) operation and to 0.5 V
for fixed input (92 to 138 Vac, or 184 to 276 Vac)
operation. Note that V
CS
 must be less than 1.4 V.
Multiplier Input Voltage
V
M
+
Vac   2
R5
R3
) 1
Set the multiplier input voltage V
M
 to 3.0 V at high line.
Empirically adjust V
M
 for the lowest distortion over the
ac line voltage range while guaranteeing startup at
minimum line.
Converter Output
Voltage
V
O
+ V
ref
R2
R1
) 1
 I
IB
R1
The I
IB
 R1 error term can be minimized with a divider
current in excess of 100 mA.
Converter Output
PeaktoPeak
Ripple Voltage
DV
O(pp)
+ I
L(pk)
1
2 p f
ac
C3
2
) ESR
2
The calculated peaktopeak ripple must be less than
16% of the average dc output voltage to prevent false
tripping of the Overvoltage Comparator. Refer to the
Overvoltage Comparator Text. ESR is the equivalent
series resistance of C3.
Error Amplifier
Bandwidth
BW +
g
m
2 p C1
The bandwidth is typically set to 20 Hz. When operating
at high ac line, the value of C1 may need to be
increased.
NOTE:   The following converter characteristics must be chosen:
V
O
 = Desired output voltage.
Vac
(LL)
 = AC RMS minimum required operating line voltage for output regulation.
I
O
 = Desired output current.
DV
O
 = Converter output peaktopeak ripple voltage.
Vac = AC RMS operating line voltage.
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