參數(shù)資料
型號(hào): MC33179P
廠商: MOTOROLA INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: Precision Timer 8-PDIP -40 to 85
中文描述: QUAD OP-AMP, 4000 uV OFFSET-MAX, 5 MHz BAND WIDTH, PDIP14
封裝: PLASTIC, DIP-14
文件頁數(shù): 9/12頁
文件大?。?/td> 262K
代理商: MC33179P
MC33178 MC33179
9
MOTOROLA ANALOG IC DEVICE DATA
10 k
A1
To
Receiver
+
1.0
μ
F
300
200 k
120 k
2.0 k
A2
820
1N4678
Tip
Phone Line
Ring
A3
VR
From
Microphone
+
+
10 k
10 k
10 k
VR
10 k
0.05
μ
F
Figure 33. Telephone Line Interface Circuit
APPLICATION INFORMATION
This unique device uses a boosted output stage to
combine a high output current with a drain current lower than
similar bipolar input op amps. Its 60
°
phase margin and 15 dB
gain margin ensure stability with up to 1000 pF of load
capacitance (see Figure 23). The ability to drive a minimum
600
load makes it particularly suitable for telecom
applications. Note that in the sample circuit in Figure 33 both
A2 and A3 are driving equivalent loads of approximately
600
.
The low input offset voltage and moderately high slew rate
and gain bandwidth product make it attractive for a variety of
other applications. For example, although it is not single
supply (the common mode input range does not include
ground), it is specified at +5.0 V with a typical common mode
rejection of 110 dB. This makes it an excellent choice for use
with digital circuits. The high common mode rejection, which
is stable over temperature, coupled with a low noise figure
and low distortion, is an ideal op amp for audio circuits.
The output stage of the op amp is current limited and
therefore has a certain amount of protection in the event of a
short circuit. However, because of its high current output, it is
especially important not to allow the device to exceed the
maximum junction temperature, particularly with the
MC33179 (quad op amp). Shorting more than one amplifier
could easily exceed the junction temperature to the extent of
causing permanent damage.
Stability
As usual with most high frequency amplifiers, proper lead
dress, component placement, and PC board layout should be
exercised for optimum frequency performance. For example,
long unshielded input or output leads may result in unwanted
input/output coupling. In order to preserve the relatively
low input capacitance associated with these amplifiers,
resistors connected to the inputs should be immediately
adjacent to the input pin to minimize additional stray input
capacitance. This not only minimizes the input pole
frequency for optimum frequency response, but also
minimizes extraneous “pick up” at this node. Supplying
decoupling with adequate capacitance immediately adjacent
to the supply pin is also important, particularly over
temperature, since many types of decoupling capacitors
exhibit great impedance changes over temperature.
Additional stability problems can be caused by high load
capacitances and/or a high source resistance. Simple
compensation schemes can be used to alleviate these
effects.
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