VCC = +15 V VO
參數(shù)資料
型號: MC33178DR2
廠商: ON Semiconductor
文件頁數(shù): 19/19頁
文件大小: 0K
描述: IC OPAMP DUAL LP LOW NOISE 8SOIC
產(chǎn)品變化通告: Product Obsolescence 14/Apr/2010
標(biāo)準(zhǔn)包裝: 1
放大器類型: 通用
電路數(shù): 2
轉(zhuǎn)換速率: 2 V/µs
增益帶寬積: 5MHz
電流 - 輸入偏壓: 100nA
電壓 - 輸入偏移: 1500µV
電流 - 電源: 1.7mA
電流 - 輸出 / 通道: 100mA
電壓 - 電源,單路/雙路(±): 4 V ~ 36 V,±2 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOICN
包裝: 剪切帶 (CT)
其它名稱: MC33178DR2OSCT
MC33178, MC33179
http://onsemi.com
9
VCC = +15 V VO = 2.0 Vpp
VEE = 15 V TA = 25°C
RL = 600 W
AV = 1000
AV = 100
AV = 10
AV = 1.0
Figure 22. Phase Margin
versus Temperature
Figure 23. Phase Margin and Gain Margin
versus Differential Source Resistance
Figure 24. Open Loop Gain Margin and Phase
Margin versus Output Load Capacitance
Figure 25. Channel Separation
versus Frequency
Figure 26. Total Harmonic Distortion
versus Frequency
Figure 27. Output Impedance
versus Frequency
φ
m
VCC = +15 V
VEE = 15 V
RL = 600 W
CL = 10 pF
CL = 100 pF
CL = 300 pF
TA, AMBIENT TEMPERATURE (°C)
55
25
0
25
50
75
100
125
,PHASE
MARGIN
(DEGREES)
RT, DIFFERENTIAL SOURCE RESISTANCE (W)
A,
GAIN
MARGIN
(dB)
m
100
1.0 k
10 k
100 k
m
φ
,PHASE
MARGIN
(DEGREES)
Gain Margin
Phase Margin
VCC = +15 V
VEE = 15 V
RT = R1+R2
VO = 0 V
TA = 25°C
A,
OPEN
LOOP
GAIN
MARGIN
(dB)
m
CL, OUTPUT LOAD CAPACITANCE (pF)
φ
10
100
1.0 k
,PHASE
MARGIN
(DEGREES)
Phase Margin
Gain Margin
VCC = +15 V
VEE = 15 V
VO = 0 V
f, FREQUENCY (Hz)
CS,
CHANNEL
SEP
ARA
TION
(dB)
100
1.0 k
10 k
100 k
1.0 M
Drive Channel
VCC = +15 V
CEE = 15 V
RL = 600 W
TA = 25°C
f, FREQUENCY (Hz)
THD,
T
O
TA
LHARMONIC
DIST
ORTION
(%)
10
100
1.0 k
10 k
100 k
f, FREQUENCY (Hz)
|Z|,
OUTPUT
IMPEDANCE
()
O
Ω
1.0 k
10 k
100 k
1.0 M
10 M
1. AV = 1.0
2. AV = 10
3. AV = 100
4. AV = 1000
VCC = +15 V
VEE = 15 V
VO = 0 V
TA = 25°C
3
4
21
60
50
40
30
20
10
0
12
10
8.0
6.0
4.0
2.0
0
18
15
12
9.0
6.0
3.0
0
150
140
130
120
110
100
10
1.0
0.1
0.01
500
400
300
200
100
0
60
50
40
30
20
10
0
60
50
40
30
0
10
20
Vin
R2
R1
VO
+
VO
600
W
+
Vin
CL
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